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SNC15031 Datasheet(PDF) 5 Page - SONiX Technology Company |
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SNC15031 Datasheet(HTML) 5 Page - SONiX Technology Company |
5 / 10 page SNC15031 One Channel Speech Controller Ver: 1.5 October 30, 2008 5 5.3 RAM SNC15031 contains 48 nibble RAM (48 x 4-bits). The 48 nibble RAM is only one page (page 0). In our programming structure, users can use the instructions, PAGE n (n=0) to switch and indicate the RAM page. Besides, users can use direct mode, M0 ~ M47 in the data transfer type instructions, to access all 48 nibbles of page 0. 5.4 Power Down Mode “End” instruction makes the IC entering into Stop Mode will stop the system clock for power savings (<3uA @VDD=3V and <6uA @VDD=4.5V.) Any valid data transition (L H or H L) occurring on any IO pin can be used to start the system clock and return to normal operating mode. 5.5 Sampling Rate Counter The unique sampling rate counter is designed in voice channel to be able to play diverse voices at different sample playing rates. The playing rate can be adaptively set up among from the wide ranges of 2.5KHz to 20KHz. This architecture yields a high-quality voice synthesis that sounds very close to its original source when played through the same amplifier and speaker circuitry. 5.6 I/O Ports There is one 4-bit I/O port P2. Any I/O can be individually programmed as either input pull low or output. Any valid data transition (H L or L H) of P2 can reactivate the chip when it is in power-down stage. I/O Port Configuration Note: (1) Weak N-MOS can serve as pull-low resistor. (2) The driving/sink current of P2 is up to 8mA/16mA Port Data Port Status To Internal Data Bus Read Control PAD Weak |
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