Integrated Silicon Solution, Inc. — www.issi.com

7

Rev. A

09/13/07

IS61NLP102436A/IS61NVP102436A

IS61NLP204818A/IS61NVP204818A

Operation

ZZ

OE

OE

OE

OE

OE

I/O STATUS

Sleep Mode

H

X

High-Z

Read

LL

DQ

L

H

High-Z

Write

L

X

Din, High-Z

Deselected

L

X

High-Z

Notes:

1. X means "Don't Care".

2. For write cycles following read cycles, the output buffers must be disabled with

OE, otherwise data bus

contention will occur.

3. Sleep Mode means power Sleep Mode where stand-by current does not depend on cycle time.

4. Deselected means power Sleep Mode where stand-by current depends on cycle time.

Operation

WE

WE

WE

WE

WE

BW

BW

BW

BW

BWa

BW

BW

BW

BW

BWb

READ

H

X

X

WRITE BYTE a

L

L

H

WRITE BYTE b

L

H

L

WRITE ALL BYTEs

L

L

L

WRITE ABORT/NOP

L

H

H

Notes:

1. X means "Don't Care".

2. All inputs in this table must beet setup and hold time around the rising edge of CLK.

Operation

WE

WE

WE

WE

WE

BW

BW

BW

BW

BWa

BW

BW

BW

BW

BWb

BW

BW

BW

BW

BWc

BW

BW

BW

BW

BWd

READ

H

X

X

X

X

WRITE BYTE a

L

L

H

H

H

WRITE BYTE b

L

H

L

H

H

WRITE BYTE c

L

H

H

L

H

WRITE BYTE d

L

H

H

H

L

WRITE ALL BYTEs

L

L

L

L

L

WRITE ABORT/NOP

L

H

H

H

H

1. X means "Don't Care".

2. All inputs in this table must beet setup and hold time around the rising edge of CLK.

External Address

1st Burst Address

2nd Burst Address

3rd Burst Address

A1 A0

A1 A0

A1 A0

A1 A0

00

01

10

11

01

00

11

10

10

11

00

01

11

10

01

00