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IS61NLP12836B Datasheet(PDF) 7 Page - Integrated Silicon Solution, Inc |
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IS61NLP12836B Datasheet(HTML) 7 Page - Integrated Silicon Solution, Inc |
7 / 29 page Integrated Silicon Solution, Inc. — www.issi.com 7 Rev. D 09/10/07 IS61NLP12832B IS61NLP12836B/IS61NVP12836B IS61NLP25618A/IS61NVP25618A 119-PIN PBgA PACKAgE CONFIGURATION 256K x 18 (TOP VIEW) PIN DESCRIPTIONS Symbol PinName A Address Inputs A0,A1 SynchronousBurstAddressInputs ADV SynchronousBurstAddressAdvance/ Load WE SynchronousRead/WriteControl Input CLK SynchronousClock CKE Clock Enable CE Synchronous Chip Select CE 2 Synchronous Chip Select CE2 Synchronous Chip Select BW x(x=a,b) SynchronousByteWriteInputs OE Output Enable ZZ PowerSleepMode MODE BurstSequenceSelection Vdd PowerSupply VSS Ground NC NoConnect DQa-DQb DataInputs/Outputs DQPa-Pb ParityDataI/O Vddq OutputPowerSupply 1 2 3 4 5 6 7 A A B NC C NC D DQb Vss E DQb Vss F VDDQ G DQb H DQb J VDDQ VDD K DQb L DQb M VDDQ DQb N DQb NC Vss P NC DQPb R A CE2 MODE A A0* A A VSS VSS VSS VSS NC VSS VSS NC NC VDD VDD VDD VDD NC Vss Vss Vss Vss Vss NC CE 2 NC A NC T U VDDQ NC VDDQ A NC NC NC A A BW b NC A1* CKE NC CLK NC WE NC OE CE NC ADV NC A NC BW a A A A DQPa DQa DQa DQa DQa A A VDDQ ZZ DQa DQa VDDQ DQa DQa VDDQ VDDQ NC VDDQ NC NC NC NC NC NC NC NC A VSS VSS NC NC NC NC NC NC NC NC NC Note:A0andA1arethetwoleastsignificantbits(LSB)oftheaddressfieldandsettheinternalburstcounterifburstisdesired. |
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