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SC9641 Datasheet(PDF) 5 Page - Silan Microelectronics Joint-stock |
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SC9641 Datasheet(HTML) 5 Page - Silan Microelectronics Joint-stock |
5 / 15 page SC9641 HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.0 2008.03.24 Http: www.silan.com.cn Page 5 of 15 (Continued) Pin No. Pin name Descriptions 12 RFIN EFM signal input 13 RFREF Comparator common mode input 14 Ir Reference current output 15 VSSA2 Analog ground 2 16 VDDA2 Analog supply 2 17 CRIN Crystal oscillation circuit input. When the master clock is input externally, input it from this pin. 18 CROUT Crystal oscillation circuit output. 19 MODE Connect ground. 20 MOT_CTRL Control the spindle motor (during focusing and jumping, if MOT_CTRL output high level signal, it can control the MOT control port of SA9529 after through 3 voltage drop diodes, then prevent the spindle reverse; in other condition, the MOT-CTRL output low level). 21 WCLK_OUT D/A interface. LR clock output. 22 SCLK_OUT D/A interface. Bit clock output. 23 DATA_OUT D/A interface. Serial data output 24 ERR C2 error flag 25 WCLK_IN D/A interface. LR clock input. 26 SCLK_IN D/A interface. Bit clock input. 27 DATA_IN D/A interface. Serial data input 28 ACK Acknowledge Signal output pin (drain open, with pull up resistor). 29 MCLK_IN DAC system clock input (16.9344MHz) 30 CL16 16.9344MHZ clock output 31 DATA \ WR Data I/O port, it is shared with write port of parallel communication. 32 STB \ RD Control I/O port, it is shared with read port of parallel communication.(drain open, with internal pull-up resistor). 33 ACK Acknowledge signal port (drain open, with internal pull-up resistor). 34 IO.7 \ DATA7 General I/O port, it is shared with data bit 7 (drain open, with internal pull up resistor). 35 IO.6 \ DATA6 General I/O port, it is shared with data bit 6 (drain open, with internal pull up resistor). 36 IO.5 \ DATA5 General I/O port, it is shared with data bit 5 (drain open, with internal pull up resistor). 37 IO.4 \ DATA4 General I/O port, it is shared with data bit 4 (drain open, with internal pull up resistor). 38 IO.3 \ DATA3 General I/O port, it is shared with data bit 3 (drain open, with internal pull up resistor). 39 IO.2 \ DATA2 General I/O port, it is shared with data bit 2 (drain open, with internal pull up resistor). 40 IO.1 \ DATA1 General I/O port, it is shared with data bit 1 (drain open, with internal pull up resistor). 41 IO.0 \ DATA0 General I/O port, it is shared with data bit 0 (drain open, with internal pull up resistor). 42 TEST Test pin. 43 RESET Reset pin (active low) 44 VDDA Analog Supply 45 VSSO Analog Ground 46 VDD0 Analog Supply (To be continued) |
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