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MC3S12HY64J0VLLR Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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MC3S12HY64J0VLLR Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 790 page  To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ A full list of family members and options is included in the appendices. The following revision history table summarizes changes contained in this document. This document contains information for all constituent modules, with the exception of the CPU. For CPU information please refer to CPU12-1 in the CPU12 & CPU12X Reference Manual. Revision History Date Revision Level Description July, 2009 1.00 initial v1.00 version Aug, 2009 1.01 update SCI block guide, update motor pad input leakage in Appendix A Nov, 2009 1.02 update FTMRC block guide, update MC10B8C block guide, minor update in chapter 1, minor typo correction in Appendix F May, 2010 1.03 update PIM block guide, update CPMU block guide, update TIM block guide Nov, 2010 1.04 update SCI block guide, update typo in device overview |
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