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S9S08MP16E2VWL Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc

Part # S9S08MP16E2VWL
Description  8-Bit HCS08 Central Processor Unit (CPU)
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

S9S08MP16E2VWL Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
MC9S08MP16 Series Data Sheet, Rev. 1
Freescale Semiconductor
11
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring PD (at equilibrium)
for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iteratively
for any value of TA.
2.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits,
normal handling precautions should be taken to avoid exposure to static discharge. Qualification tests are performed to ensure
that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. During
the device qualification, ESD stresses were performed for the human body model (HBM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete
DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot
temperature, unless instructed otherwise in the device specification.
2.6
DC Characteristics
This section includes information about power supply requirements and I/O pin characteristics.
Table 5. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human
Body
Series resistance
R1
1500
Ω
Storage capacitance
C
100
pF
Number of pulses per pin
3
Latch-up
Minimum input voltage limit
– 2.5
V
Maximum input voltage limit
7.5
V
Table 6. ESD and Latch-Up Protection Characteristics
No.
Rating1
1 Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol
Min
Max
Unit
1
Human body model (HBM)
VHBM
± 2000
V
2
Charge device model (CDM)
VCDM
± 500
V
3
Latch-up current at TA = 105°CILAT
± 100
mA
Table 7. DC Characteristics
Num C
Characteristic
Symbol
Condition
Min
Typ1
Max
Unit
1
— Operating Voltage
VDD
2.7
5.5
V
2
— Analog Supply voltage delta to VDD (VDD –VDDA)
(2)
ΔV
DDA
—0
±100
mV
3
— Analog Ground voltage delta to VSS (VSS –VSSA)
(2)
ΔV
SSA
—0
±100
mV


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