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PCIMX514AJM6C Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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PCIMX514AJM6C Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 160 page i.MX51A Automotive and Infotainment Applications Processors, Rev. 1 10 Freescale Semiconductor Preliminary—Subject to Change Without Notice Features TZIC TrustZone Aware Interrupt Controller ARM/Control The TrustZone Interrupt Controller (TZIC) collects interrupt requests from all i.MX51A sources and routes them to the ARM core. Each interrupt can be configured as a normal or a secure interrupt. Software Force Registers and software Priority Masking are also supported. UART-1 UART-2 UART-3 UART Interface Connectivity Peripherals Each of the UART modules supports the following serial data transmit/receive protocols and configurations: • 7 or 8 bit data words, 1 or 2 stop bits, programmable parity (even, odd, or none) • Programmable baud rates up to 4 MHz. This is a higher max baud rate relative to the 1.875 MHz, which is stated by the TIA/EIA-232-F standard and previous Freescale UART modules. • 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting auto-baud • IrDA 1.0 support (up to SIR speed of 115200 bps) • Option to operate as 8-pins full UART, DCE, or DTE USB USB 2.0 High-Speed OTG and 3x Hosts Connectivity Peripherals USB-OTG contains one high-speed OTG module, which is internally connected to the on-chip HS USB PHY. There are an additional three high-speed host modules that require external USB PHYs. VPU Video Processing Unit Multimedia Peripherals A high-performing video processing unit (VPU), which covers many SD-level video decoders and SD-level encoders as a multi-standard video codec engine as well as several important video processing such as rotation and mirroring. VPU Features: • MPEG-4 decode: 720p, 30 fps, simple profile and advanced simple profile • MPEG-4 encode: D1, 25/30 fps, simple profile • H.263 decode: 720p, 30 fps, profile 3 • H.263 encode: D1, 25/30 fps, profile 3 • H.264 decode: 720p, 30 fps, baseline, main, and high profile • H.264 encode: D1, 25/30 fps, baseline profile • MPEG-2 decode: 720p, 30 fps, MP-ML • MPEG-2 encode: D1, 25/30 fps, MP-ML (in software with partial acceleration in hardware) • VC-1 decode: 720p, 30 fps, simple, main, and advanced profile • DivX decode: 720p, 30 fps versions 3, 4, and 5 • RV10 decode: 720p, 30 fps • MJPEG decode: 32 Mpix/s • MJPEG encode: 64 Mpix/s WDOG-1 Watch Dog Timer Peripherals The Watch Dog Timer supports two comparison points during each counting period. Each of the comparison points is configurable to evoke an interrupt to the ARM core, and a second point evokes an external event on the WDOG line. Table 2. i.MX51A Digital and Analog Modules (continued) Block Mnemonic Block Name Subsystem Brief Description |
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