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MMA8115EGR2 Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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MMA8115EGR2 Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
9 / 47 page MMA81XXEG Sensors Freescale Semiconductor 9 Figure 2-1. Status Logic Representation The signal STDIS in Figure 2-1 is set when self-test lockout is activated through the execution of two consecutive Disable Self- Test Stimulus commands, as described in Section 4.6.6. If self-test lockout has been activated, a DSI Clear command or power- on reset is required to clear a fault condition which results in reset of the D flip-flop. DDIS FUSE ERROR GF GLDE LOCK1 PAR1 FAULT LOCK2 PAR2 FAULT D R Q ST 1 S TRANSIENT UNDERVOLTAGE CONDITION SHORT WORD ACCELERATION DATA = 0 KEY: DDIS DEVICE DISABLE BIT, DEVCFG2[4] FUSE FAULT OTP FUSE THRESHOLD FAILURE GLDE GROUND LOSS DETECTION BIT, DEVCFG2[5] GF GROUND FAULT DETECTION CONDITION LOCK1 FACTORY PROGRAMMED OTP LOCK BIT LOCK2 CUSTOMER PROGRAMMED OTP LOCK BIT PAR1 FAULT FACTORY PROGRAMMED OTP PARITY FAULT CONDITION S ACCELEROMETER STATUS FLAG ST SELF-TEST ACTIVATION CONDITION PAR2 FAULT CUSTOMER PROGRAMMED OTP PARITY FAULT CONDITION U STDIS SELF-TEST DISABLE STDIS U UNDERVOLTAGE FLAG |
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