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MC-4516DA726 Datasheet(PDF) 1 Page - Elpida Memory |
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MC-4516DA726 Datasheet(HTML) 1 Page - Elpida Memory |
1 / 16 page MOS INTEGRATED CIRCUIT MC-4516DA726 16 M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE DATA SHEET Document No. E0074N10 (1st edition) (Previous No. M13203EJ8V0DS00) Date Published January 2001 CP(K) Printed in Japan The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for availability and additional information. Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd. Description The MC-4516DA726 is a 16,777,216 words by 72 bits synchronous dynamic RAM module on which 9 pieces of 128M SDRAM: µPD45128841 are assembled. These modules provide high density and large quantities of memory in a small space without utilizing the surface- mounting technology on the printed circuit board. Decoupling capacitors are mounted on power supply line for noise reduction. Features • 16,777,216 words by 72 bits organization (ECC type) • Clock frequency and access time from CLK Part number /CAS latency Clock frequency Access time from CLK Module type (MAX.) (MAX.) MC-4516DA726EFC-A80 CL = 3 125 MHz 6 ns PC100 Registered DIMM CL = 2 100 MHz 6 ns Rev. 1.2 Compliant MC-4516DA726EFC-A10 CL = 3 100 MHz 6 ns CL = 2 77 MHz 7 ns MC-4516DA726PFC-A80 CL = 3 125 MHz 6 ns CL = 2 100 MHz 6 ns MC-4516DA726PFC-A10 CL = 3 100 MHz 6 ns CL = 2 77 MHz 7 ns MC-4516DA726XFC-A80 CL = 3 125 MHz 6 ns CL = 2 100 MHz 6 ns MC-4516DA726XFC-A10 CL = 3 100 MHz 6 ns CL = 2 77 MHz 7 ns • Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge • Pulsed interface • Possible to assert random column address in every cycle • Quad internal banks controlled by BA0 and BA1 (Bank Select) • Programmable burst-length (1, 2, 4, 8 and Full Page) • Programmable wrap sequence (Sequential / Interleave) • Programmable /CAS latency (2, 3) This product became EOL in March, 2004. |
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