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HM5164405FLJ-5 Datasheet(PDF) 8 Page - Elpida Memory |
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HM5164405FLJ-5 Datasheet(HTML) 8 Page - Elpida Memory |
8 / 34 page HM5164405F Series, HM5165405F Series Data Sheet E0097H10 8 DC Characteristics (HM5164405F Series) HM5164405F -5 -6 Parameter Symbol Min Max Min Max Unit Test conditions Operating current* 1, *2 I CC1 — 110 — 100 mA t RC = min Standby current I CC2 — 2 — 2 mA TTL interface RAS, CAS = V IH Dout = High-Z — 0.5 — 0.5 mA CMOS interface RAS, CAS ≥ V CC – 0.2 V Dout = High-Z Standby current (L-version) I CC2 — 300 — 300 µA CMOS interface RAS, CAS ≥ V CC – 0.2 V Dout = High-Z RAS-only refresh current* 2 I CC3 — 110 — 100 mA t RC = min Standby current* 1 I CC5 — 5 — 5mA RAS = V IH, CAS = VIL Dout = enable CAS-before-RAS refresh current I CC6 — 110 — 100 mA t RC = min EDO page mode current* 1, *3 I CC7 — 110 — 100 mA RAS = V IL , CAS cycle, t HPC = t HPC min Battery backup current* 4 (Standby with CBR refresh) (L-version) I CC10 — 1.2 — 1.2 mA CMOS interface Dout = High-Z CBR refresh: t RC = 15.6 µs t RAS ≤ 0.3 µs Self refresh mode current (L-version) I CC11 — 500 — 500 µA CMOS interface RAS, CAS ≤ 0.2 V Dout = High-Z Input leakage current I LI –55 –5 5 µA 0 V ≤ Vin ≤ V CC + 0.3 V Output leakage current I LO –55 –5 5 µA 0 V ≤ Vout ≤ V CC Dout = disable Output high voltage V OH 2.4 V CC 2.4 V CC V High Iout = –2 mA Output low voltage V OL 0 0.4 0 0.4 V Low Iout = 2 mA Notes: 1. I CC depends on output load condition when the device is selected. I CC max is specified at the output open condition. 2. Address can be changed once or less while RAS = V IL. 3. Measured with one sequential address change per EDO cycle, t HPC. 4. V IH ≥ VCC – 0.2 V, 0 V ≤ VIL ≤ 0.2 V. |
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