EDE5108AJBG-1J datasheet(11/77 Pages) ELPIDA

Part #	EDE5108AJBG-1J

Description	512M bits DDR2 SDRAM

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Manufacturer	ELPIDA [Elpida Memory]

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EDE5108AJBG-1J, EDE5116AJBG-1J

Data Sheet E1174E30 (Ver. 3.0)

11

ODT DC Electrical Characteristics (TC = 0

°C to +85°C, VDD, VDDQ = 1.8V ± 0.1V)

Parameter

Symbol

min.

typ.

max.

Unit

Note

Rtt effective impedance value for EMRS (A6, A2)

= 0, 1; 75 Ω

Rtt1 (eff)

60

75

90

Ω

1

Rtt effective impedance value for EMRS (A6, A2)

= 1, 0; 150 Ω

Rtt2 (eff)

120

150

180

Ω

1

Rtt effective impedance value for EMRS (A6, A2)

= 1, 1; 50 Ω

Rtt3 (eff)

40

50

60

Ω

1

Deviation of VM with respect to VDDQ/2

∆VM

−6



+6

%

1

Note: 1. Test condition for Rtt measurements.

Measurement Definition for Rtt (eff)

Apply VIH (AC) and VIL (AC) to test pin separately, then measure current I(VIH (AC)) and I(VIL (AC)) respectively.

VIH (AC), and VDDQ values defined in SSTL

_18.

))

(

))

(

)

(

)

(

)

(

AC

VIL

I

AC

VIH

I

AC

VIL

AC

VIH

eff

Rtt

−

=

Measurement Definition for

∆VM

Measure voltage (VM) at test pin (midpoint) with no load.

100

1

2

×













−

×

=

∆

VDDQ

VM

OCD Default Characteristics (TC = 0

°C to +85°C, VDD, VDDQ = 1.8V ± 0.1V)

Parameter

min.

typ.

max.

Unit

Notes

Output impedance

12.6

18

23.4

Ω

1, 5

Pull-up and pull-down mismatch

0



4

Ω

1, 2

Output slew rate

1.5



5

V/ns

3, 4

Notes: 1. Impedance measurement condition for output source DC current: VDDQ = 1.7V; VOUT = 1420mV;

(VOUT

−VDDQ)/IOH must be less than 23.4Ω for values of VOUT between VDDQ and VDDQ−280mV.

Impedance measurement condition for output sink DC current: VDDQ = 1.7V; VOUT = 280mV;

VOUT/IOL must be less than 23.4

Ω for values of VOUT between 0V and 280mV.

2. Mismatch is absolute value between pull up and pull down, both are measured at same temperature and

voltage.

3. Slew rate measured from VIL (AC) to VIH (AC).

4. The absolute value of the slew rate as measured from DC to DC is equal to or greater than the slew rate

as measured from AC to AC. This is guaranteed by design and characterization.

5. DRAM I/O specifications for timing, voltage, and slew rate are no longer applicable if OCD is changed

from default settings.

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