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| EDD51163DBH-6ELS-F |
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48 page 
EDD51163DBH-LS Preliminary Data Sheet E1433E30 (Ver. 3.0) 48 Initialize Sequence CK /CK CKE VDD VDDQ /CS /RAS /CAS /WE BA1 A10 Address DM DQ, DQS High-Z tMRD Address key 2 refresh cycles are necessary Precharge All Banks Command is necessary VDD/VDDQ powered up clock stable Mode Register Set Command is necessary Extended Mode Register Set Command is necessary Auto-Refresh Command is necessary Activate Command Auto-Refresh Command is necessary BA0 Clock cycle is necessary VIH = Don't care Address key tRFC tRFC tRP tCK 200 µs tMRD |
