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DCR4100W35 Datasheet(PDF) 7 Page - Dynex Semiconductor |
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DCR4100W35 Datasheet(HTML) 7 Page - Dynex Semiconductor |
7 / 10 page SEMICONDUCTOR DCR4100W42 7/10 www.dynexsemi.com 20 30 40 50 60 110 100 Number of cycles Conditions: Tcase = 125°C VR =0 Pulse width = 10ms 0 20 40 60 80 100 120 140 160 180 110100 Pulse width, tP - (ms) 0 20 40 60 I 2t ITSM Conditions: Tcase= 125°C VR = 0 half-sine wave Fig.10 Multi-cycle surge current Fig.11 Single-cycle surge current 0 5000 10000 15000 20000 25000 30000 0 5 10 15 20 25 30 Rate of decay of on-state current, di/dt - (A/us) Max QS = 5404.7*(di/dt) 0.4733 Min QS = 2246.2*(di/dt) 0.5657 Conditions: Tj = 125ºC, VRpeak ~ 2500V, VRM ~ 1700V snubber as required to control reverse voltages 0 100 200 300 400 500 600 700 800 0 5 10 15 20 25 30 Rate of decay of on-state current, di/dt - (A/us) IRR max = 62.4*(di/dt) 0.7284 IRR min = 36.417*(di/dt) 0.8041 Conditions: Tj = 125ºC, VRpeak ~ 2500V, VRM ~ 1700V snubber as required to control reverse voltages Fig.12 Stored charge Fig.13 Reverse recovery current |
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