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PS21964-ST Datasheet(PDF) 3 Page - Mitsubishi Electric Semiconductor

Part # PS21964-ST
Description  Dual-In-Line Package Intelligent Power Module TRANSFER-MOLD TYPE INSULATED TYPE
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

PS21964-ST Datasheet(HTML) 3 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21964-ST
TRANSFER-MOLD TYPE
INSULATED TYPE
Mar. 2009
3
2.20
2.30
2.20
1.90
0.75
2.20
0.80
1
10
3.0
3.9
mA
V
Tj = 25
°C
Tj = 125
°C
IC = 15A, Tj = 25
°C
IC = 15A, Tj = 125
°C
VCE(sat)
VEC
ton
trr
tc(on)
toff
tc(off)
ICES
Condition
Symbol
Parameter
Limits
Inverter IGBT part (per 1/6 module)
Inverter FWD part (per 1/6 module)
Rth(j-c)Q
Rth(j-c)F
Min.
THERMAL RESISTANCE
Typ.
Max.
Unit
Tj = 25
°C, –IC = 15A, VIN = 0V
Condition
Symbol
Parameter
Limits
Min.
Typ.
Max.
0.70
Unit
ELECTRICAL CHARACTERISTICS (Tj = 25
°C, unless otherwise noted)
INVERTER PART
Collector-emitter saturation
voltage
FWD forward voltage
Junction to case thermal
resistance
(Note 3)
VD = VDB = 15V
VIN = 5V
Switching times
VCC = 300V, VD = VDB = 15V
IC = 15A, Tj = 125
°C, VIN = 0 ↔ 5V
Inductive load (upper-lower arm)
Collector-emitter cut-off
current
VCE = VCES
1.70
1.80
1.70
1.30
0.30
0.50
1.60
0.50
V
µs
µs
µs
µs
µs
°C/W
°C/W
Note 3 : Grease with good thermal conductivity should be applied evenly with about +100
µm~+200µm on the contacting surface of DIPIPM and
heat-sink.
The contacting thermal resistance between DIPIPM case and heat sink (Rth(c-f)) is determined by the thickness and the thermal
con-
ductivity of the applied grease. For reference, Rth(c-f) (per 1/6 module) is about 0.3
°C/W when the grease thickness is 20µm and
the thermal conductivity is 1.0W/m·k.
CONTROL (PROTECTION) PART
Symbol
ID
VFOH
VFOL
VSC(ref)
IIN
OTt
OTrh
UVDBt
UVDBr
UVDt
UVDr
tFO
Vth(on)
Vth(off)
Vth(hys)
Parameter
Condition
Limits
Unit
Circuit current
Fault output voltage
Short circuit trip level
Control supply under-voltage
protection
Fault output pulse width
ON threshold voltage
OFF threshold voltage
ON/OFF threshold hysteresis
voltage
VD = VDB = 15V
VIN = 5V
Total of VP1-VNC, VN1-VNC
VUFB-U, VVFB-V, VWFB-W
VSC = 0V, FO terminal pull-up to 5V by 10k
VSC = 1V, IFO = 1mA
Tj = 25
°C, VD = 15V
(Note 4)
VIN = 5V
Trip level
Trip/reset hysteresis
Trip level
Reset level
Trip level
Reset level
(Note 6)
Applied between UP, VP, WP, UN, VN, WN-VNC
4.9
0.43
0.70
100
10.0
10.5
10.3
10.8
20
0.8
0.35
0.48
1.00
120
10
2.1
1.3
0.65
2.80
0.55
2.80
0.55
0.95
0.53
1.50
140
12.0
12.5
12.5
13.0
2.6
Min.
Typ.
Max.
mA
V
V
V
mA
°C
V
V
V
V
µs
V
V
V
VD = VDB = 15V
VIN = 0V
Total of VP1-VNC, VN1-VNC
VUFB-U, VVFB-V, VWFB-W
Tj
≤ 125°C
Input current
Note 4 : Short circuit protection is functioning only for the lower-arms. Please select the external shunt resistance such that the SC trip-level is
less than 1.7 times of the current rating.
5: Over temperature protection (OT) outputs fault signal, when the LVIC temperature exceeds OT trip temperature level (OTt). In that case
if the heat sink comes off DIPIPM or fixed loosely, don’t reuse that DIPIPM. (There is a possibility that junction temperature of power chips
exceeded maximum Tj (150
°C)).
6: Fault signal is asserted only corresponding to a SC, a UV or an OT failure at lower side, and the FO pulse width is different for each fail-
ure modes. For SC failure, FO output is with a fixed width of 20
µsec(min), but for UV or OT failure, FO output continuously during the
whole UV or OT period, however, the minimum FO pulse width is 20
µsec(min) for very short UV or OT period less than 20µsec.
Over temperature protection
(Note 5)
VD = 15V,
At temperature of LVIC


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