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MCP6231 Datasheet(PDF) 11 Page - Microchip Technology

Part # MCP6231
Description  20 關A, 300 kHz Rail-to-Rail Op Amp
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP6231 Datasheet(HTML) 11 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS21881E-page 11
MCP6231/1R/1U/2/4
4.0
APPLICATION INFORMATION
The MCP6231/1R/1U/2/4 family of op amps is
manufactured using Microchip’s state-of-the-art CMOS
process and is specifically designed for low-cost,
low-power and general-purpose applications. The low
supply voltage, low quiescent current and wide
bandwidth makes the MCP6231/1R/1U/2/4 ideal for
battery-powered applications.
4.1
Rail-to-Rail Inputs
4.1.1
PHASE REVERSAL
The MCP6231/1R/1U/2/4 op amp is designed to
prevent phase reversal when the input pins exceed the
supply voltages. Figure 4-1 shows the input voltage
exceeding the supply voltage without any phase
reversal.
FIGURE 4-1:
The MCP6231/1R/1U/2/4
Show No Phase Reversal.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-2. This structure was chosen to
protect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltages that go too far
above VDD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass
quick ESD events within the specified limits.
FIGURE 4-2:
Simplified Analog Input ESD
Structures.
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
currents and voltages at the VIN+ and VIN– pins (see
Absolute Maximum Ratings † at the beginning of
Section 1.0 “Electrical Characteristics”). Figure 4-3
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN–) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pins. Diodes D1 and D2 prevent the
input pins (VIN+ and VIN–) from going too far above
VDD, and dump any currents onto VDD. When
implemented as shown, resistors R1 and R2 also limit
the current through D1 and D2.
FIGURE 4-3:
Protecting the Analog
Inputs.
It is also possible to connect the diodes to the left of
resistors R1 and R2. In this case, current through the
diodes D1 and D2 needs to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC current into the input pins (VIN+ and
VIN–) should be very small.
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Time (1 ms/div)
VOUT
VIN
VDD = 5.0V
G = +2 V/V
Bond
Pad
Bond
Pad
Bond
Pad
VDD
VIN+
VSS
Input
Stage
Bond
Pad
VIN
V1
MCP623X
R1
VDD
D1
R1 >
VSS – (minimum expected V1)
2mA
R2 >
VSS – (minimum expected V2)
2mA
V2
R2
D2
R3


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