M52S64164A-10BG datasheet(4/47 Pages) ESMT

Part #	M52S64164A-10BG

Description	1M x 16 Bit x 4 Banks Synchronous DRAM

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Manufacturer	ESMT [Elite Semiconductor Memory Technology Inc.]

Direct Link	http://www.esmt.com.tw/index.asp

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4 / 47 page

ESMT

M52S64164A

Elite Semiconductor Memory Technology Inc.

Publication Date: Sep. 2008

Revision: 1.4

4/47

DC CHARACTERISTICS

Recommended operating condition unless otherwise noted，TA = 0 to 70

C

°

Version

Parameter

Symbol

Test Condition

CAS

Latency

-7.5

-10

Unit Note

Operating Current

(One Bank Active)

ICC1

Burst Length = 1

tRC

≥ tRC (min), tCC ≥ tCC (min), IOL= 0mA

60

50

mA

1

ICC2P

CKE

≤ VIL(max), tCC =15ns

1

mA

Precharge Standby

Current in power-down

mode

ICC2PS

CKE

≤ VIL(max), CLK ≤ VIL(max), tCC = ∞

0.5

mA

ICC2N

CKE

≥ VIH(min), CS ≥ VIH(min), tCC =10ns

Input signals are changed one time during 20ns

10

mA

Precharge Standby

Current in non

power-down mode

ICC2NS

CKE

≥ VIH(min), CLK ≤ VIL(max), tCC =

∞

Input signals are stable

7

mA

ICC3P

CKE

≤ VIL(max), tCC =15ns

5

Active Standby Current

in power-down mode

ICC3PS

CKE

≤ VIL(max), CLK ≤ VIL(max), tCC = ∞

5

mA

ICC3N

CKE

≥ VIH(min), CS ≥ VIH(min), tCC=15ns

Input signals are changed one time during 2clks

All other pins

≥ VDD-0.2V or ≤ 0.2V

50

mA

Active Standby Current

in non power-down

mode

(One Bank Active)

ICC3NS

CKE

≥ VIH (min), CLK ≤ VIL(max), tCC= ∞

Input signals are stable

40

mA

Operating Current

(Burst Mode)

ICC4

IOL= 0mA, Page Burst

All Band Activated, tCCD = tCCD (min)

105

85

mA

1

Refresh Current

ICC5

tRC

≥ tRC(min)

115

110

mA

2

TCSR range

70

C

°

4 Banks

420

2 Bank

350

1 Bank

300

Self Refresh Current

ICC6

CKE

≤ 0.2V

1/2 Bank

300

uA

Deep Power Down

Current

ICC7

CKE

≤ 0.2V

50

uA

Note: 1.Measured with outputs open. Addresses are changed only one time during tCC(min).

2.Refresh period is 64ms. Addresses are changed only one time during tCC(min).

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