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M52D64164A-10TG Datasheet(PDF) 6 Page - Elite Semiconductor Memory Technology Inc.

Part # M52D64164A-10TG
Description  1M x 16 Bit x 4 Banks Mobile Synchronous DRAM
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Manufacturer  ESMT [Elite Semiconductor Memory Technology Inc.]
Direct Link  http://www.esmt.com.tw/index.asp
Logo ESMT - Elite Semiconductor Memory Technology Inc.

M52D64164A-10TG Datasheet(HTML) 6 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M52D64164A
Elite Semiconductor Memory Technology Inc.
Publication Date: Jul. 2009
Revision: 1.6
6/48
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
-10
Parameter
Symbol
Min
Max
Unit
Note
CAS Latency =3
10
CLK cycle time
CAS Latency =2
tCC
15
1000
ns
1
CAS Latency =3
9
CLK to valid
output delay
CAS Latency =2
tSAC
13.5
ns
1
Output data hold time
tOH
2.5
ns
2
CLK high pulse width
tCH
3
ns
3
CLK low pulse width
tCL
3
ns
3
Input setup time
tSS
2.5
ns
3
Input hold time
tSH
1
ns
3
CLK to output in Low-Z
tSLZ
1
ns
2
CAS Latency =3
9
CLK to output in
Hi-Z
CAS Latency =2
tSHZ
13.5
ns
-
*All AC parameters are measured from half to half.
Note: 1.Parameters depend on programmed CAS latency.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to the
parameter.


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