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SM59128 Datasheet(PDF) 1 Page - SyncMOS Technologies,Inc |
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SM59128 Datasheet(HTML) 1 Page - SyncMOS Technologies,Inc |
1 / 32 page SyncMOS Technologies International, Inc. SM59128 8-Bits Micro-controller Embedded 128KB flash & 1KB RAM & IIC & SPWM Specifications subject to change without notice contact your sales representatives for the most recent information. ISSFD-M027Ver: B SM59128 06/2009 1 Product List SM59128C25, 25MHz 128KB internal flash MCU SM59128C40, 40MHz 128KB internal flash MCU Description The SM59128 series product is an 8-bit single chip microcontroller embedded with 128KB on-chip flash with In-System Programming (ISP) capability and 1024 bytes RAM. It is a derivative of the 8052 microcontroller family. In addition, SM59128 has IIC interface which is compatible with standard VESA DDC/CI and built in 4-channel SPWM. User can access on-chip expanded RAM by its ‘bank mapping direct addressing mode’ scheme. With its hardware features and powerful instruction sets, it’s straight forward to make it a versatile and cost effective controller for those applications which demand up to 32 I/O pins for PDIP package or up to 36 I/O pins for PLCC or QFP package, or applications which need up to 64K bytes flash memory for program and/or for data. To program the on-chip flash memory, commercial writers are available by parallel programming method. On the other hand, the on-chip flash memory can be programmed through either parallel or serial interface with its ISP feature. Ordering Information yymmv SM59128ihhkL yy: year, mm: month v: version identifier{ , A, B,…} i: process identifier {L=3.0V~3.6V,C=4.5V~ 5.5V} hh: working clock in MHz {25, 40} k: package type postfix {as below table} L: PB Free identifier {No text is Non-PB Free,”P”is PB Free} Postfix Package Pin / Pad Configuration P 40L PDIP Page 2 J 44L PLCC Page 3 Q 44L QFP Page 4 Features Working Voltage: 4.5V to 5.5 V General 8052 family compatible 12 clocks per machine cycle 128K bytes on-chip flash with In-System Programming (ISP) capability IIC (Two wire serial bus) interface compliant with VESA DDC 2B/2Bi/2B+ standard On-chip 1024 bytes RAM Three 16-bit Timers/Counters One Watch Dog Timer Four 8-bit I/O ports for PDIP package Four 8-bit I/O ports + one 4-bit I/O ports for PLCC or QFP package Full duplex serial channel Bit operation instruction Temperature range of Industrial level 8-bit Unsigned Division 8-bit Unsigned Multiply BCD arithmetic Direct Addressing Indirect Addressing Nested Interrupt Two priority level interrupt A serial I/O port Power-Saving mode: Idle mode and Power-down mode Code protection function Low EMI (inhibit ALE) Reset with address $0000 blank initiate ISP service program Configurable ISP service program space with N*512 bytes (N=0 to 8) size 4-channel SPWM function Flash Memory Endurance : 100K erase and write cycles each byte at TA=25℃ Flash Memory Data Retention :10 years Taiwan 6F, No.10-2 Li- Hsin 1st Road , Science-based Industrial Park, Hsinchu, Taiwan 30078 TEL: 886-3-567-1820 886-3-567-1880 FAX: 886-3-567-1891 886-3-567-1894 |
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