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XR16M580IL32 Datasheet(PDF) 5 Page - Exar Corporation |
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XR16M580IL32 Datasheet(HTML) 5 Page - Exar Corporation |
5 / 56 page XR16M580 5 REV. 1.0.0 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO RX 6 7 E4 I UART Receive Data or infrared receive data. Normal receive data input must idle at logic 1 condition. The infrared receiver idles at logic 0. This input should be connected to VCC when not used. RTS# 21 32 B3 O UART Request-to-Send (active low) or general purpose output. This output must be asserted prior to using auto RTS flow control, see EFR[6], MCR[1] and IER[6]. CTS# 24 38 A1 I UART Clear-to-Send (active low) or general purpose input. It can be used for auto CTS flow control, see EFR[7], MSR[4] and IER[7]. This input should be connected to VCC when not used. DTR# 22 33 - O UART Data-Terminal-Ready (active low) or general purpose output. DSR# 25 39 - I UART Data-Set-Ready (active low) or general purpose input. This input should be connected to VCC when not used. CD# 26 40 - I UART Carrier-Detect (active low) or general purpose input. This input should be connected to VCC when not used. RI# 27 41 - I UART Ring-Indicator (active low) or general purpose input. This input should be connected to VCC when not used. ANCILLARY SIGNALS XTAL1 10 14 D5 I Crystal or external clock input. XTAL2 11 15 - O Crystal or buffered clock output. PwrSave 9 13 C4 I Power-Save (active high). This feature isolates the M580’s data bus interface from the host preventing other bus activities that cause higher power drain during sleep mode. See Sleep Mode with Auto Wake-up and Power-Save Feature section for details. This pin does not have an internal pull-down resistor. This input should be con- nected to GND when not used. 16/68# 2 1 B2 I Intel or Motorola Bus Select. When 16/68# pin is at logic 1, 16 or Intel Mode, the device will operate in the Intel bus type of interface. When 16/68# pin is at logic 0, 68 or Motorola mode, the device will operate in the Motorola bus type of interface. This pin does not have an internal pull-up or pull-down resistor. RESET (RESET#) 23 35 A2 I When 16/68# pin is at logic 1 for Intel bus interface, this input becomes RESET (active high). When 16/68# pin is at logic 0 for Motorola bus interface, this input becomes RESET# (active low). A 40 ns minimum active pulse on this pin will reset the internal reg- isters and all outputs of the UART. The UART transmitter output will be held at logic 1, the receiver input will be ignored and outputs are reset during reset period (see UART Reset Conditions). VCC 28 42 B1 Pwr 1.62V to 3.63V power supply. GND 13 18 E5 Pwr Power supply common, ground. GND Center Pad - - Pwr The center pad on the backside of the QFN package is metallic and should be connected to GND on the PCB. The thermal pad size on the PCB should be the approximate size of this center pad and should be solder mask defined. The solder mask opening should be at least 0.0025" inwards from the edge of the PCB thermal pad. Pin Description NAME 32-QFN PIN# 48-TQFP PIN# 25-BGA PIN# TYPE DESCRIPTION |
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Similar Description - XR16M580IL32 |
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