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SP202ECP-L Datasheet(PDF) 5 Page - Exar Corporation |
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SP202ECP-L Datasheet(HTML) 5 Page - Exar Corporation |
5 / 17 page 5 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-7000 • www.exar.com SP202E,232E,233E, 30E, 32E_00_0608 DESCRiPTion DETAiLED DESCRiPTion The SP202E, SP232E, SP233E, SP30E and SP32A devices are a family of line driver and receiver pairs that meet the EIA/TIA-232 and V.28 serial communication protocols. The ESD tolerance has been improved on these devices to over +/-5kV for Human Body Model. These devices are pin-to-pin compatible with Exar's 232A, 233A, 30A and 32A as well as popular industry standards. This family of parts offer a 20kbps data rate, 0V/μs slew rate and an on- board charge pump that operates from a single 5V supply using 0.μF ceramic capacitors. The SP202E, 232E, 233E, 30E and 32E de- vices have internal charge pump voltage con- verters which allow them to operate from a sin- gle +5V supply. The charge pumps will operate with polarized or non-polarized capacitors rang- ing from 0. to 0µF and will generate the +/-6V needed to generate the RS-232 output levels. The SP233E design offers internal charge pump capacitors. The SP30E provides an ON/OFF input that simultaneously disables the internal charge pump circuit and puts all transmitter and receiver outputs into a high impedance state. The SP32E is identical to the SP30E but with seperate tri-state and shutdown inputs Theory of operation The SP202E, SP232E, SP233E, SP30E and SP32E devices are made up of three basic circuit blocks: 1. Drivers, 2. Receivers, and 3. charge pump. Each block is described below. Drivers The drivers are inverting level transmitters that convert TTL or CMOS logic levels to EIA/TIA- 232 levels with an inverted sense relative to the input logic levels. The typical driver output voltage swing is +/-6V. Even under worst case loading conditions of 3k ohms and 2500pF, the driver output is guaranteed to be +/-5.0V mini- mum, thus satisfying the RS-232 specification. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. The slew rate of the driver output is internally limited to 30V/μs in order to meet the EIA stan- dards (EIA-232F). Additionally, the driver out- puts LOW to HIGH transition meets the mon- tonic output requirements of the standard. Receivers The receivers convert EIA/TIA-232 signal lev- els to inverted TTL or CMOS logic output lev- els. Since the input is usually from a transmis- sion line, where long cable length and system interference can degrade the signal, the inputs have a typical hysteresis margin of 500mV. This ensures that the receiver is virtually immune to noisy transmission lines. The input thresholds are 0.8V minimum and 2.8V maximum, again well within the +/-3V RS-232 requirements. Should an input be left unconnected, an internal 5kohm pull-down resistor to ground will commit the output of the receiver to a HIGH state. In actual system applications, it is quite pos- sible for signals to be applied to receiver inputs before power is applied to the receiver circuitry. This occurs, for example, when a PC user at- tempts to print, only to realize that the printer wasn't turned on. In this case an RS-232 signal from the PC will appear on the receiver input at the printer. When the printer power is turned on, the receiver will operate normally. All of these devices are fully protected. Charge pump The charge pump is an Exar patented design and uses a unique approach compared to older less efficiant designs. The charge pump requires 4 external capacitors and uses a four phase voltage shifting technique. The internal power supply consists of a dual charge pump that provides a driver output voltage swing of +/-6V. The internal oscillator controls the four phases of the voltage shifting. A description of each phase follows: Phase 1 Vss charge store and double: The positive ter- minals of capacitors C and C2 are charged from Vcc with their negative terminals initially connected to ground. C+ is then connected to ground and the stored charge from C- is superimposed onto C2-. Since C2+ is still con- nected to Vcc the voltage potential across C2 is now 2 x Vcc. Phase 2 Vss transfer and invert: Phase two connects the negative terminal of C2 to the Vss storage capacitor and the positive terminal of C2 to ground. This transfers the doubled and invert- ed (V-) voltage onto C4. Meanwhile, capacitor |
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