XRT86SH328_08 datasheet(4/271 Pages) EXAR

Part #	XRT86SH328

Description	28-CHANNEL SONET/SDH VT MAPPER REGISTER DESCRIPTION WITH M13

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Manufacturer	EXAR [Exar Corporation]

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XRT86SH328

I

28-CHANNEL SONET/SDH VT MAPPER REGISTER DESCRIPTION WITH M13

REV. 1.0.1

TABLE OF CONTENTS

GENERAL DESCRIPTION ................................................................................................ 1

FEATURES ................................................................................................................................................. 1

APPLICATIONS .......................................................................................................................................... 1

FIGURE 1. BLOCK DIAGRAM OF THE XRT86SH328 .......................................................................................................................... 2

TABLE 1: ORDERING INFORMATION ................................................................................................................................................... 2

FIGURE 2. PIN OUT OF THE XRT86SH328 (BOTTOM VIEW) ............................................................................................................... 3

TABLE OF CONTENTS ............................................................................................................ I

1.0 REGISTER MAP & DESCRIPTION FOR THE XRT86SH328 SONET/SDH WITH DS3 MUX AND VT-MAP-

PER IC - SONET APPLICATIONS .......................................................................................................... 4

1.1 REGISTER MAP OF THE XRT86SH328 ............................................................................................................. 4

TABLE 2: OPERATION CONTROL REGISTERS ..................................................................................................................................... 4

TABLE 3: RECEIVE STS-1/STS-3 TOH PROCESSOR BLOCK REGISTERS ........................................................................................... 5

TABLE 4: RECEIVE STS-1/STS-3 POH PROCESSOR BLOCK REGISTERS ........................................................................................... 9

TABLE 5: RECEIVE STS-1/STS-3 TRANSPORT - RECEIVE SECTION TRACE MESSAGE BUFFER ......................................................... 12

TABLE 6: RECEIVE STS-1/STS-3 PATH - RECEIVE PATH TRACE MESSAGE BUFFER ........................................................................ 12

TABLE 7: RECEIVE TU-3 POH PROCESSOR BLOCK REGISTERS (SDH/TUG-3 APPLICATIONS ONLY) ................................................ 12

TABLE 8: RECEIVE TU-3 POH PROCESSOR BLOCK - RECEIVE PATH TRACE MESSAGE BUFFER (SDH/TUG-3 APPLICATIONS ONLY) 14

TABLE 9: TRANSMIT STS-1/STS-3 TOH PROCESSOR BLOCK REGISTERS ....................................................................................... 14

TABLE 10: TRANSMIT STS-1/STS-3 POH PROCESSOR BLOCK REGISTERS ..................................................................................... 16

TABLE 11: TRANSMIT STS-1/STS-3 TOH PROCESSOR BLOCK - TRANSMIT SECTION TRACE MESSAGE BUFFER .............................. 18

TABLE 12: TRANSMIT STS-1/STS-3 POH PROCESSOR BLOCK - TRANSMIT PATH TRACE MESSAGE BUFFER ................................... 18

TABLE 13: TRANSMIT TU-3 POH PROCESSOR BLOCK REGISTERS (SDH/TUG-3 APPLICATIONS ONLY) ............................................ 18

TABLE 14: TRANSMIT TU-3 POH PROCESSOR BLOCK - TRANSMIT PATH TRACE MESSAGE BUFFER ................................................. 19

TABLE 15: VT MAPPER CONTROL REGISTERS ................................................................................................................................ 20

TABLE 16: DS3 MAPPER CONTROL REGISTERS .............................................................................................................................. 21

TABLE 17: DS3 FRAMER AND M13 MUX BLOCK REGISTERS .......................................................................................................... 21

TABLE 18: VT MAPPER REGISTER (WHERE N RANGES IN VALUE FROM 0X01 TO 0X1C) .................................................................... 26

2.0 REGISTER DESCRIPTIONS.................................................................................................................. 29

TABLE 19: OPERATION CONTROL REGISTER - BYTE 3 (ADDRESS = 0X0000) ................................................................................... 29

2.1 OPERATION CONTROL REGISTERS.............................................................................................................. 29

TABLE 20: OPERATION CONTROL REGISTER - BYTE 3 (ADDRESS = 0X0000) ................................................................................... 29

TABLE 21: OPERATION CONTROL REGISTER - BYTE 2 (ADDRESS = 0X0001) ................................................................................... 31

TABLE 22: OPERATION CONTROL REGISTER - BYTE 0 (ADDRESS = 0X0003) ................................................................................... 31

TABLE 23: DEVICE ID VALUE REGISTER - BYTE 3 (ADDRESS = 0X0004) ......................................................................................... 32

TABLE 24: REVISION NUMBER VALUE REGISTER - BYTE 2 (ADDRESS = 0X0005) ............................................................................. 32

TABLE 25: OPERATION INTERRUPT STATUS REGISTER - BYTE 0 (ADDRESS = 0X000B) .................................................................... 32

TABLE 26: OPERATION INTERRUPT ENABLE REGISTER - BYTE 0 (ADDRESS = 0X000F) .................................................................... 33

TABLE 27: OPERATION BLOCK INTERRUPT STATUS REGISTER - BYTE 1 (ADDRESS = 0X0012) ......................................................... 33

TABLE 28: OPERATION BLOCK INTERRUPT STATUS REGISTER - BYTE 0 (ADDRESS = 0X0013) ......................................................... 34

TABLE 29: OPERATION BLOCK INTERRUPT ENABLE REGISTER - BYTE 1 (ADDRESS = 0X0016) ......................................................... 35

TABLE 30: OPERATION BLOCK INTERRUPT ENABLE REGISTER - BYTE 0 (ADDRESS = 0X0017) ......................................................... 36

TABLE 31: MODE CONTROL REGISTER - BYTE 0 (ADDRESS = 0X001B) ........................................................................................... 37

TABLE 32: LOOP-BACK CONTROL REGISTER - BYTE 0 (ADDRESS = 0X001F) ................................................................................... 38

TABLE 33: STS-1/STS-3 TELECOM BUS CONTROL REGISTER - BYTE 3 (ADDRESS = 0X0034) ........................................................ 38

TABLE 34: STS-1/STS-3 TELECOM BUS CONTROL REGISTER - BYTE 2 (ADDRESS = 0X0035) ........................................................ 39

TABLE 35: STS-3/STS-1/STS-3 TELECOM BUS CONTROL REGISTER - BYTE 1 (ADDRESS = 0X0036) ............................................. 39

TABLE 36: STS-3/STS-1/STS-3 TELECOM BUS CONTROL REGISTER - BYTE 0 (ADDRESS = 0X0037) ............................................. 41

TABLE 37: OPERATION BLOCK - INTERFACE CONTROL REGISTER (ADDRESS = 0X003C) .................................................................. 43

TABLE 38: OPERATION GENERAL PURPOSE INPUT/OUTPUT REGISTER - BYTE 0 (ADDRESS = 0X0047) ............................................ 43

TABLE 39: OPERATION GENERAL PURPOSE INPUT/OUTPUT DIRECTION REGISTER 0 (ADDRESS = 0X004B) ...................................... 44

TABLE 40: OPERATION I/O CONTROL REGISTER 1 (ADDRESS = 0X004E) ....................................................................................... 44

TABLE 41: OPERATION I/O CONTROL REGISTER 0 (ADDRESS = 0X004F) ....................................................................................... 44

TABLE 42: BIT FIELD CONTENTS FOR RECOVERED LINE CLOCK SELECT .......................................................................................... 45

TABLE 43: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (VT SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0050) .......... 46

TABLE 44: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (VT SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0051) .......... 46

TABLE 45: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (VT SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0052) .......... 47

TABLE 46: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (VT SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0053) .......... 47

TABLE 47: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (M13 SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0054) ....... 47

TABLE 48: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (M13 SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0055) ....... 48

TABLE 49: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (M13 SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0056) ....... 48

TABLE 50: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 FRAMER (M13 SIDE) BLOCK - BYTE 3 (ADDRESS = 0X0057) ....... 49

TABLE 51: CHANNEL INTERRUPT INDICATION REGISTER - DS1/E1 LIU BLOCK - BYTE 3 (ADDRESS = 0X0058) ................................. 49

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