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MAXQ7667 Datasheet(PDF) 8 Page - Maxim Integrated Products

Part # MAXQ7667
Description  16-Bit, RISC, Microcontroller-Based, Ultrasonic Distance-Measuring System
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAXQ7667 Datasheet(HTML) 8 Page - Maxim Integrated Products

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16-Bit, RISC, Microcontroller-Based,
Ultrasonic Distance-Measuring System
8
_______________________________________________________________________________________
Note 1: Noise measured at bandpass filter output with ECHO+ and ECHO- shorted divided by the gain with fBPF = 50kHz.
Note 2: Gain adjust resolution typically ranges between 6.25% and 12.5%.
Note 3: LIN 2.0 specifies a maximim data rate of 20kbps. Higher data rates could be possible with compatible devices and suitable
line conditions.
ELECTRICAL CHARACTERISTICS (continued)
(VDVDDIO = +5V, VAVDD = +3.3V; VDVDD = +2.5V, system clock (fSYSCLK) = 16MHz, burst frequency (fBURST) = bandpass frequency
(fBPF) = 50kHz, CREFBG = CREF = 1µF in parallel with 0.01µF, fADCCLK = 2MHz (SAR data rate = 125ksps), TA = TMIN to TMAX, unless
otherwise specified. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI INTERFACE TIMING (Figures 11 and 12)
SPI Master Operating
Frequency
1/tMCK
0.5 x fSYSCLK
8
MHz
SPI Slave Operating
Frequency
1/tSCK
0.25 x fSYSCLK
4
MHz
SCLK Output Pulse-Width
High/Low
tMCH,
tMCL
tMCK/2
- 25
ns
MOSI Output Hold Time
After SCLK Sample Edge
tMOH
tMCK/2
- 25
ns
MOSI Output Valid to Sample
Edge
tMOV
tMCK/2
- 25
ns
MISO Input Valid to SCLK
Sample Edge
tMIS
25
ns
MISO Input Hold Time After
SCLK Sample Edge
tMIH
0ns
SCLK Inactive to MOSI
Inactive
tMLH
0ns
SCLK Input Pulse-Width
High/Low
tSCH,
tSCL
tSCK/2
ns
SS Active to First Shift Edge
tSSE
4tSYSCLK
ns
MOSI Input Setup Time to
SCLK Sample Edge
tSIS
25
ns
MOSI Input Hold Time After
SCLK Sample Edge
tSIH
25
ns
MISO Output Valid After
SCLK Shift Edge Transition
tSOV
50
ns
SS Inactive Duration
tSSH
tSYSCLK +
25
ns
SCLK Inactive to SS Rising
Edge
tSD
tSYSCLK +
25
ns
FLASH PROGRAMMING
Mass erase
200
Flash Erase Time
Page erase (512 bytes per page)
20
ms
Flash Programming Time
20µs per word
657
ms
Write/Erase Cycles
10,000
Cycles
Data Retention
Average temperature = +85°C
15
Years


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