Low-Charge Injection, 16-Channel,

High-Voltage Analog Switches

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Detailed Description

The MAX14800–MAX14803 provide high-voltage

switching on 16 channels for ultrasound imaging and

printer applications. The devices utilize HVCMOS

process technology to provide 16 high-voltage low-

charge-injection SPST switches, controlled by a digital

interface. Data is clocked into an internal 16-bit shift

register and retained by a programmable latch with

enable and clear inputs. A power-on-reset function

ensures that all switches are open on power-up.

The MAX14800–MAX14803 operate with a wide range

-100V, +200V/0V, or +40V/-160V. The digital interface

Digital inputs DIN, CLK, LE, and CLR operate on the

provide integrated 35k

Ω bleed resistors on each switch

terminal to discharge capacitive loads. The MAX14802/

MAX14803 provide integrated clamping diodes for

overvoltage protection against positive overshoot. The

MAX14802/MAX14803 feature clamping diodes (at the

COM_). These clamping diodes provide overvoltage

protection against positive overshoot.

Analog Switch

The MAX14800–MAX14803 allow a peak-to-peak analog

up and power-down.

High-Voltage Supplies

The MAX14800–MAX14803 allow a wide range of high-

must not exceed 250V.

Bleed Resistors (MAX14801/MAX14803)

The MAX14801/MAX14803 feature integrated 35k

Ω

bleed resistors to discharge capacitive loads such as

piezoelectric transducers. Each analog switch terminal

is connected to GND with a bleed resistor.

Overvoltage Protection

(MAX14802/MAX14803)

The MAX14802/MAX14803 feature clamping diodes (at

the COM_). These clamping diodes provide overvolt-

age protection against positive overshoot.

Serial Interface

The MAX14800–MAX14803 are controlled by a serial

interface with a 16-bit serial shift register and transpar-

ent latch. Each of the sixteen data bits controls a single

analog switch (see Table 1). Data on DIN is clocked

with the most significant bit (MSB) first into the shift reg-

ister on the rising edge of CLK. Data is clocked out of

the shift register onto DOUT on the rising edge of CLK.

DOUT reflects the status of DIN, delayed by 16 clock

cycles (see Figures 1 and 2).

Latch Enable (

LE)

Drive LE logic-low to change the contents of the latch

and update the state of the high-voltage switches

(Figure 2). Drive LE logic-high to freeze the contents of

the latch and prevent changes to the switch states. To

reduce noise due to clock feedthrough, drive LE logic-

high while data is clocked into the shift register. After

the data shift register is loaded with valid data, pulse

LE logic-low to load the contents of the shift register

into the latch.

Latch Clear (CLR)

The MAX14800–MAX14803 feature a latch clear input.

Drive CLR logic-high to reset the contents of the latch

to zero and open all switches. CLR does not affect the

contents of the data shift register. Pulse LE logic-low to

reload the contents of the shift register into the latch.

Power-On Reset

The MAX14800–MAX14803 feature a power-on-reset

circuit to ensure all switches are open at power-on. The

internal 16-bit serial shift register and latch are set to

zero on power-up.