MAX3627 datasheet(2/11 Pages) MAXIM

Part #	MAX3627

Description	3.3V, Low-Jitter, Precision Clock Generator with Multiple Outputs

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Manufacturer	MAXIM [Maxim Integrated Products]

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+3.3V, Low-Jitter, Precision Clock

Generator with Multiple Outputs

2

_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD = +3.0V to +3.6V, TA = 0°C to +70°C, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25°C, unless otherwise

noted. When using X_IN, X_OUT input, no signal is applied at OSC_IN. When PLL is enabled, PLL_BP = high-Z or high. When PLL is

bypassed, PLL_BP = low.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

Supply Voltage Range at VDD, VDDA,

VDDO_SE, VDDO_DIFF ................................................-0.3V to +4.0V

Voltage Range at Q0, Q0, Q1, Q1, Q2, Q2,

Q3, Q3, Q4, Q4, Q5, Q5, Q6, Q6, Q7,

PLL_BP, FSELA, FSELB, OE, OSC_IN ...-0.3V to (VDD + 0.3V)

Voltage Range at X_IN ..........................................-0.3V to +1.2V

Voltage Range at X_OUT .................................-0.3V to (VDD - 0.6V)

Continuous Power Dissipation (TA = +70

°C)

32-Pin TQFN-EP (derate 34.5mW/

°C above +70°C)..2759mW

Operating Junction Temperature Range ...........-55°C to +150°C

Storage Temperature Range .............................-65°C to +160°C

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

PLL enabled

190

256

Power-Supply Current (Note 2)

IDD

PLL bypassed

175

mA

LVDS OUTPUTS (Q0,

Q0, Q1, Q1, Q2, Q2, Q3, Q3, Q4, Q4, Q5, Q5, Q6, Q6)

Output High Voltage

VOH

1.475

V

Output Low Voltage

VOL

0.925

V

Differential Output Voltage

Amplitude

|VOD|

Figure 1

250

400

mV

Change in Magnitude of

Differential Output for

Complementary States

|VOD|

25

mV

Output Offset Voltage

VOS

1.125

1.275

V

Change in Magnitude of Output

Offset Voltage for

Complementary States

|VOS|

25

mV

Differential Output Impedance

80

105

140

Shorted together

5

Output Current

Short to ground (Note 3)

8

mA

Clock Output Rise/Fall Time

tr, tf

20% to 80%, RL = 100

100

200

330

ps

PLL enabled

48

50

52

Output Duty-Cycle Distortion

PLL bypassed (Note 4)

46

50

54

%

LVCMOS/LVTTL OUTPUT (Q7)

Output Frequency

160

MHz

Output High Voltage

VOH

IOH = -12mA

2.6

VDD

V

Output Low Voltage

VOL

IOL = 12mA

0.4

V

Output Rise/Fall Time

tr, tf

20% to 80% at 125MHz (Note 5)

0.15

0.4

0.8

ns

PLL enabled

46

50

54

Output Duty-Cycle Distortion

PLL bypassed (Note 4)

45

50

55

%

Output Impedance

ROUT

15

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