remain above this level for proper operation, regardless

Input Capacitor

Bypass IN to ground with a 10µF or greater ceramic

capacitor. Bypass BIAS to ground with a 0.1µF ceramic

capacitor for normal operation in most applications.

Output Capacitor

Bypass OUT to ground with a low-ESR ceramic capaci-

tor greater than 10µF. The ESR must be less than

35m

Ω. Choose an output capacitor to maintain the

required output voltage tolerance during a load step.

The change in output voltage is,

tance, and

Δt is the duration of the load step.

Noise, PSRR, and Transient Response

The MAX1982/MAX1983 operate with low-dropout volt-

age and low quiescent current in notebook computers

while maintaining good noise, transient response, and

AC rejection specifications. See the

Typical Operating

Characteristics for a graph of Power-Supply Rejection

Ratio (PSRR) vs. Frequency. Improved supply-noise

rejection and transient response can be achieved by

increasing the values of the input and output capacitors

and use passive filtering techniques when operating

from noisy sources.

The MAX1982/MAX1983 load-transient response graphs

(see the

Typical Operating Characteristics) show two

components of the output response: a DC shift from the

output impedance due to the load current change and

the transient response. A typical transient response for a

step change in the load current from 1mA to 300mA is

20mV. Increasing the output capacitor’s value and

decreasing the ESR attenuate the overshoot.

Input/Output (Dropout) Voltage

A regulator’s minimum input-to-output voltage differen-

tial (dropout voltage) determines the lowest usable sup-

ply voltage. In battery-powered systems, the dropout

voltage determines the useful end-of-life battery volt-

age. Because the MAX1982/MAX1983 use an N-chan-

nel pass transistor, the dropout voltage is a function of

Ω max)

multiplied by the load current (see the

Typical

Operating Characteristics):

PC Board Layout Guidelines

The MAX1982/MAX1983 require proper layout to

achieve the intended output power level, high efficiency,

and low noise. Proper layout involves the use of a

ground plane, appropriate component placement, and

correct routing of traces using appropriate trace widths.

1) Minimize high-current ground loops. Connect the

ground of the device, the input capacitor, and the

output capacitor together at one point.

2) To optimize performance, a ground plane is essen-

tial. Use all available copper layers in applications

where the device is located on a multilayer board.

3) Connect the input filter capacitor less than 10mm

from IN. The connecting copper trace carries large

currents and must be at least 2mm wide, preferably

5mm wide.

4) Use as much copper as necessary to increase the

thermal resistance of the device. In general, more

copper provides better heatsinking capabilities.

VV

V

R

I

DROPOUT

IN

OUT

DS ON

OUT

==

×

−

()

Δ

Δ

V

I ESR

t

=+

⎡

⎣

⎢

⎢

⎤

⎦

⎥

⎥

Low-Voltage, Low-Dropout Linear Regulators

with External Bias Supply

______________________________________________________________________________________

11

INPUT-OUTPUT DIFFERENTIAL VOLTAGE (V)

5

4

3

2

1

50

100

150

200

250

300

350

0

0

MAXIMUM CONTINUOUS CURRENT

°C

°C

°C

°C

Figure 5. Power Operating Region—Maximum Output Current

vs. Supply Voltage