Note 1: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS referenced to a 1.024V full-scale

input voltage range.

Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is

6dB better, if referenced to the two-tone envelope.

Note 4: Wake-up time is defined as the time from complete reference power-down until the ADC performs within 0.3 ENOB of the

2.3µF.

Note 6: Guaranteed by design and engineering characterization.

10-Bit, 60Msps, 3.0V, Low-Power

ADC with Internal Reference

_______________________________________________________________________________________

5

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

POWER REQUIREMENTS

Analog Supply Voltage

2.7

3.0

3.6

V

Output Supply Voltage

1.7

3.0

3.6

V

30

37

mA

Analog Supply Current

Shutdown, clock idle, PD =

415

µA

-0.5dBFS

7mA

Output Supply Current

Shutdown, clock idle, PD =

120

µA

Offset

± 0.1

mV/V

Power-Supply Rejection

PSRR

Gain

± 0.1

%/V

TIMING CHARACTERISTICS

CLK Rise to Output Data Valid

Figure 5 (Notes 3, 6)

2

5

8

ns

OE Fall to Output Enable

Figure 5

10

ns

OE Rise to Output Disable

Figure 5

1.5

ns

Clock Duty Cycle

Figure 6, clock period 16ns (Notes 5, 6)

45

55

%

Wake-Up Time

(Notes 4, 6)

366

520

µs

ELECTRICAL CHARACTERISTICS (continued)

to REFIN through a 10k

°C.)