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SPT9693SCC Datasheet(PDF) 6 Page - Cadeka Microcircuits LLC. |
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SPT9693SCC Datasheet(HTML) 6 Page - Cadeka Microcircuits LLC. |
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6 / 10 page  6 3/1/01 SPT9693 GENERAL INFORMATION The SPT9693 is an ultrahigh-speed dual voltage com- parator. It offers tight absolute characteristics. The device has differential analog inputs and complementary logic outputs compatible with ECL systems. The output stage is adequate for driving terminated 50 ohm transmission lines. The SPT9693 has a complementary latch enable control for each comparator. Both should be driven by standard ECL logic levels. A common mode voltage range of –3 V to +8 V is achieved by a proprietary JFET input design, which requires a separate negative power supply (AVEE). The dual comparators have separate AVCC, AVEE, and grounds for each comparator to achieve high crosstalk rejection. Single-channel operation can be accomplished by floating all pins (including the ground and supply pins) of the un- used comparator. Power dissipation during single-channel operation is 50% of the dissipation during dual-channel operation. This comparator offers the following improvements over existing devices: • Ultra low input bias current and input current offset • Common mode voltage of –3 to +8 V • Short propagation delays • Excellent input and output rejection between comparator channels • Improved input protection reliability due to JFET input stage design All of these combined features produce high-performance products with timing stability and repeatability for large system precision. Figure 1 – Internal Function Diagram CLK BUF LE LE LATCH ECL OUT REF 1 REF 2 VCC GND PRE AMP + +IN IN AVEE Q Q |
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