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T15M256B Datasheet(PDF) 5 Page - Taiwan Memory Technology |
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T15M256B Datasheet(HTML) 5 Page - Taiwan Memory Technology |
5 / 13 page TE CH tm T15M256B TM Technology Inc. reserves the right P. 5 Publication Date: MAY. 2002 to change products or specifications without notice. Revision:A AC CHARACTERISTICS (Vcc= 5V / ± 10%, Vss = 0V, Ta =0 ~ +70 °C/ -40 to 85°C) (1) READ CYCLE -50ns -70ns -85ns -100ns PARAMETER SYM. MIN MAX MIN. MAX. MIN. MAX. MIN. MAX. UNIT Read Cycle Time tRC 50 - 70 - 85 - 100 - ns Address Access Time tAA - 50 - 70 - 85 - 100 ns Chip Select Access Time tACS - 50 - 70 - 85 - 100 ns Output Enable to Output Valid tAOE - 25 - 35 - 40 - 50 ns Chip Selection to Output in Low Z tCLZ* 7 - 10 - 10 - 10 - ns Output Enable to Output in Low Z tOLZ* 5 - 5 - 5 - 5 - ns Chip Deselection to Output in High Z tCHZ* - 20 - 25 - 30 - 30 ns Output Disable to Output in High Z tOHZ* - 20 - 25 - 30 - 30 ns Output Hold from Address Change tOH 10 - 10 - 10 - 10 - ns * These parameters is measured with 5pF test load. (2)WRITE CYCLE -50ns -70ns -85ns -100ns PARAMETER SYM. MIN MAX MIN. MAX. MIN. MAX. MIN. MAX. UNIT Write Cycle Time tWC 50 - 70 - 85 - 100 - ns Chip Selection to End of Write tCW 40 - 60 - 70 - 80 - ns Address Valid to End of Write tAW 40 - 60 - 70 - 80 - ns Address Setup Time tAS 0 - 0 - 0 - 0 - ns Write Pulse Width tWP 30 - 50 - 60 - 70 - ns Write Recovery Time tWR 0 - 0 - 0 - 0 - ns Data Valid to End of Write tDW 25 - 30 - 35 - 40 - ns Data Hold from End of Write tDH 0 - 0 - 0 - 0 - ns Write to Output in High Z tWHZ* - 20 - 25 - 30 - 30 ns Output Active from End of Write tOW 5 - 5 - 5 - 5 - ns * These parameters is measured with 30pF test load. |
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