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UCC381DP-ADJG4 Datasheet(PDF) 5 Page - Texas Instruments |
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UCC381DP-ADJG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 10 page 5 UCC281-3/-5/-ADJ UCC381-3/-5/-ADJ Overview The UCC381 family of low dropout linear (LDO) regula- tors provide a regulated output voltage for applications with up to 1A of load current. The regulator features a low dropout voltage and short circuit protection, making their use ideal for demanding high current applications requiring fault tolerance. Short Circuit Protection The UCC381 provides unique short circuit protection circuitry that reduces power dissipation during a fault. When an overload situation is detected, the device en- ters a pulsed mode of operation at 3% duty cycle re- ducing the heat sink requirements during a fault. The UCC381 has two current thresholds that determine its behavior during a fault as shown in Fig. 1. When the regulator current exceeds the Overcurrent Threshold for a period longer than the TON, the UCC381 shuts off for a period (TOFF) which is 32 times TON. If the short circuit current exceeds the Peak Cur- rent Limit, the regulator limits the current to peak cur- rent limit during the TON period. The peak current limit is nominally 1 Amp greater than the overcurrent thresh- old. The regulator will continue in pulsed mode until the fault is cleared as illustrated in Fig. 1. A capacitive load on the regulator’s output will appear as a short circuit during start-up. If the capacitance is too large, the output voltage will not come into regulation during the initial TON period and the UCC381 will enter pulsed mode operation. The peak current limit, TON period, and load characteristics determine the maximum value of output ca- pacitor that can be charged. For a constant current load the maximum output capacitance is given as follows: () () CI I T V Farads OUT CL LOAD ON OUT max =− • (1) For worst case calculations the minimum values of on time (TON) and peak current limit (ICL) should be used. The ad- justable version allows the TON time to be adjusted with a capacitor on the CT pin: () () ( ) T C Farads ON adj µµ sec , =• 660 000 (2) For a resistive load (RLOAD) the maximum output capacitor can be estimated from: () C T Rn V IR OUT ON LOAD OUT CL LOAD max = • − • l 1 1 Farads (3) APPLICATION INFORMATION 32T ON T ON T ON T ON 32T ON 32T ON V O (nom) OUTPUT VOLTAGE I O (nom) OUTPUT CURRENT R OL ICL PEAK CURRENT LIMIT OVERCURRENT THRESHOLD OVERLOAD Figure 1. UCC381 short circuit timing. UDG-98150 |
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