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CY62157EV30 MoBL®
Document #: 38-05445 Rev. *F
Page 8 of 15
Figure 8 shows WE Controlled write cycle waveforms.[17, 21, 22]
Figure 8. Write Cycle No. 1
Figure 9 shows CE1 or CE2 Controlled write cycle waveforms.
[17, 21, 22]
Figure 9. Write Cycle No. 1
Switching Waveforms (continued)
tHD
tSD
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZOE
VALID DATA
tBW
NOTE 23
CE1
ADDRESS
CE2
WE
DATA IO
OE
BHE/BLE
tHD
tSD
tPWE
tHA
tAW
tSCE
tWC
tHZOE
VALID DATA
tBW
tSA
NOTE 23
CE1
ADDRESS
CE2
WE
DATA IO
OE
BHE/BLE
Notes
21. Data I/O is high impedance if OE = VIH.
22. If CE1 goes HIGH and CE2 goes LOW simultaneously with WE = VIH, the output remains in a high impedance state.
23. During this period, the I/Os are in output state. Do not apply input signals.
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