CY25200
Programmable Spread Spectrum
Clock Generator for EMI Reduction
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
, CA 95134-1709
•
408-943-2600
Document #: 38-07633 Rev. *E
Revised May 22, 2008
Features
■ Wide operating output (SSCLK) frequency range
❐ 3–200 MHz
■ Programmable spread spectrum with nominal 31.5 kHz
modulation frequency
■ Center spread: ±0.25% to ±2.5%
■ Down spread: –0.5% to –5.0%
■ Input frequency range
❐ External crystal: 8–30 MHz fundamental crystals
❐ External reference: 8–166 MHz clock
■ Integrated phase-locked loop (PLL)
■ Programmable crystal load capacitor tuning array
■ Low cycle-to-cycle jitter
■ 3.3V operation with 2.5V output clock drive option
■ Spread spectrum On and Off function
■ Power down or Output Enable function
■ Output frequency select option
■ Field-programmable
■ Package: 16 pin TSSOP
Benefits
■ Suitable for most PC peripherals, networking, and consumer
applications.
■ Provides wide range of spread percentages for maximum EMI
reduction to meet regulatory agency Electro Magnetic
Compliance (EMC) requirements. Reduces development and
manufacturing costs and time to market.
■ Eliminates the need for expensive and difficult to use higher
order crystals.
■ Internal PLL generates up to 200 MHz outputs; also generates
custom frequencies from an external crystal or a driven source.
■ Enables fine tuning of output clock frequency by adjusting
CLoad of the crystal. Eliminates the need for external CLoad
capacitors.
■ Application compatibility in standard and low power systems.
■ Provides ability to enable or disable spread spectrum with an
external pin.
■ Enables low power state or output clocks to High-Z state.
■ Enables quick generation of sample prototype quantities.
Divider
PLL
SSCLK3
Q
P
VCO
Φ
SSCLK2
SSCLK4
SSCLK5/REFOUT/CP2
SSCLK6/REFOUT/CP3
Bank 1
Divider
Bank 2
Output
Select
SSCLK1
Matrix
VDDL
AVSS
AVDD
VSS
VSSL
VDD
CP0
CP1
2
35
13
11
6
410
7
8
9
12
14
15
XIN/CLKIN
OSC.
XOUT
CXIN
1
CXOUT
16
Logic Block Diagram
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