2 / 11 page
CY23S08
Document #: 38-07265 Rev. *I
Page 2 of 11
Pinouts
Figure 1. 16-Pin Package
Table 1. Pin Definition - 16-Pin Package
Pin
Signal
Description
1REF[1]
Input reference frequency, 5V tolerant input
2CLKA1[2]
Clock output, Bank A
3CLKA2[2]
Clock output, Bank A
4VDD
3.3V supply
5
GND
Ground
6
CLKB1[2]
Clock output, Bank B
7
CLKB2[2]
Clock output, Bank B
8
S2[3]
Select input, bit 2
9
S1[3]
Select input, bit 1
10
CLKB3[2]
Clock output, Bank B
11
CLKB4[2]
Clock output, Bank B
12
GND
Ground
13
VDD
3.3V supply
14
CLKA3[2]
Clock output, Bank A
15
CLKA4[2]
Clock output, Bank A
16
FBK
PLL feedback input
9
16
FBK
CLKA4
CLKA3
VDD
GND
CLKB4
CLKB3
S1
1
2
3
4
5
6
7
8
10
11
12
13
14
15
REF
CLKA1
CLKA2
VDD
GND
CLKB1
CLKB2
S2
Top View
Notes
1. Weak pull down.
2. Weak pull down on all outputs.
3. Weak pull ups on these inputs.
[+] Feedback
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
