ZL2106

5

Data Sheet Revision 2/19/2009

www.intersil.com

Table 3. Electrical Characteristics (continued)

Parameter

Conditions

Min

Typ

Max

Unit

Tracking

VTRK input bias current

VTRK = 5.5 V

–

110

200

µA

VTRK tracking ramp accuracy

-100

–

100

mV

VTRK regulation accuracy

-1

–

1

%

Fault Protection Characteristics

UVLO threshold range

2.85

–

16

V

UVLO set-point accuracy

-150

–

150

mV

Factory default

–

3

–

%

UVLO hysteresis

0

–

100

%

UVLO delay

–

–

2.5

µs

Factory default

–

90

–

Factory default

–

115

–

Factory default

–

5

–

%

Using pin-strap or resistor

2

–

20

ms

Power good delay

0

–

500

s

Factory default

–

85

–

VSEN undervoltage threshold

0

–

110

Factory default

–

115

–

VSEN overvoltage threshold

0

–

115

VSEN undervoltage hysteresis

–

5

–

Factory default

–

16

–

µs

VSEN undervoltage/ overvoltage fault

response time

5

–

60

µs

Factory default

–

–

9.0

A

Peak current limit threshold

0.2

–

9.0

A

Current limit set-point accuracy

–

±10

–

Factory default

–

5

–

10

Current limit protection delay

1

–

32

10

Factory default

–

125

–

°C

Thermal protection threshold

(junction temperature)

-40

–

125

°C

Thermal protection hysteresis

–

15

–

°C

Notes:

3. Percentage of Full Scale (FS) with temperature compensation applied.

4. The device requires a delay period following an enable signal and prior to ramping its output. Precise timing mode limits this

delay period to approx 2 ms, where in normal mode it may vary up to 4 ms.

5. Precise ramp timing mode is only valid when using EN pin to enable the device rather than PMBus enable. Precise ramp

timing mode is automatically disabled for a self-enabled device (EN pin tied high).

6. The devices may require up to a 4 ms delay following the assertion of the enable signal (normal mode) or following the de-

8. Factory default is the initial value in firmware. The value can be changed via PMBus commands.