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ZL2106 Datasheet(PDF) 8 Page - Intersil Corporation |
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ZL2106 Datasheet(HTML) 8 Page - Intersil Corporation |
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8 / 35 page  ZL2106 8 Data Sheet Revision 2/19/2009 www.intersil.com 3. Pin Descriptions VSET SA SCL SDA SALRT FC PG SYNC DGND ZL2106 SW SW SW SW SW PGND VDDP SW BST Exposed Paddle Connect to SGND 1 2 3 4 5 6 7 8 9 27 26 25 24 23 22 21 20 19 Figure 7. ZL2106 Pin Configurations (top view) Table 4. Pin Descriptions Pin Label Type 1 Description 1 PG O Power good. This pin transitions high 100 ms after output voltage stabilizes within regulation band. Selectable open drain or push-pull output. Factory default is open drain. 2 DGND PWR Digital ground. Common return for digital signals. Connect to low impedance ground plane. 3 SYNC I/O, M2 Clock synchronization pin. Used to set switching frequency of internal clock or for synchronization to external frequency reference. 4 VSET I, M Output voltage select pin. Used to set VOUT set-point and VOUT max. 5 SA I, M Serial address select pin. Used to assign unique SMBus address to each IC. 6 SCL I/O Serial clock. Connect to external host interface. 7 SDA I/O Serial data. Connect to external host interface. 8 SALRT O Serial alert. Connect to external host interface if desired. 9 FC I, M Loop compensation select pin. Used to set loop compensation. 10 CFG I, M Configuration pin. Used to control the SYNC pin, sequencing and enable tracking. 11 SS I, M Soft Start pin. Used to set the ramp delay and ramp time, sets UVLO and configure tracking. 12 VTRK I Track sense pin. Used to track an external voltage source. 13 VSEN I Output voltage positive feedback sensing pin. 14 SGND PWR Common return for analog signals. Connect to low impedance ground plane. 15-19 PGND PWR Power ground. Common return for internal switching MOSFETs. Connect to low impedance ground plane. 20-25 SW I/O Switching node (level-shift common). 26 BST PWR Bootstrap voltage for level-shift driver (referenced to SW). Notes: 1. I = Input, O = Output, PWR = Power or Ground, M = Multi-mode pins. 2. The SYNC pin can be used as a logic pin, a clock input or a clock output. |
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