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ZL2008ALAFT Datasheet(PDF) 10 Page - Intersil Corporation |
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ZL2008ALAFT Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 47 page ZL2008 10 Data Sheet Revision 2/19/2009 www.intersil.com 3. Typical Application Circuit The following application circuit represents a typical implementation of the ZL2008. For PMBus operation, it is recommended to tie the enable pin (EN) to SGND. ZL2008 1 2 3 4 5 6 7 8 9 27 26 25 24 23 22 21 20 19 DGND SYNC SA0 SA1 ILIM CFG0 SCL SDA SALRT VDD BST GH SW PGND GL VR ISENA ISENB VIN 10 µF 4 V CIN 3 x 10 µF 25 V LOUT I2C/SMBus 2 POWER GOOD OUTPUT CV25 DB BAT54 CB 1 µF 16 V QH QL 2.2 µH COUT 2 x 47 µF 6.3 V 4.7 µF CVR 6.3 V VOUT RTN EPAD 12V V25 470 µF 2.5 V POS-CAP 2*220 µF 6.3 V 100 m ENABLE F.B.1 Ground unification 4.7 µF 25 V DDC Bus 3 Notes: 1. Ferrite bead is optional for input noise suppression 2. The I2C/SMBus requires pull-up resistors. Please refer to the I2C/SMBus specifications for more details. 3. The DDC bus requires a pull-up resistor. The resistance will vary based on the capacitive loading of the bus (and on the number of devices connected). The 10 k default value, assuming a maximum of 100 pF per device, provides the necessary 1 µs pull-up rise time. Please refer to the DDC Bus section for more details. PHASE ENABLE Figure 4. 12 V to 1.8 V / 16 A Application Circuit |
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