CY7C1423JV18-300BZI datasheet(2/28 Pages) CYPRESS

Part #	CY7C1423JV18-300BZI

Description	36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture

Download	28 Pages

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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2 / 28 page

CY7C1422JV18, CY7C1429JV18

CY7C1423JV18, CY7C1424JV18

Document #: 001-44699 Rev. *B

Page 2 of 28

Logic Block Diagram (CY7C1422JV18)

Logic Block Diagram (CY7C1429JV18)

CLK

A(20:0)

Gen.

K

Control

Logic

Address

Register

D[7:0]

Read Data Reg.

LD

Q[7:0]

Reg.

8

16

8

NWS[1:0]

VREF

Write

Data Reg

8

21

8

R/W

LD

R/W

CQ

DOFF

Write

Data Reg

Control

Logic

C

8

CLK

A(20:0)

Gen.

K

Control

Logic

Address

Register

D[8:0]

Read Data Reg.

LD

Q[8:0]

Reg.

9

18

9

BWS[0]

VREF

Write

Data Reg

9

21

9

R/W

LD

R/W

CQ

DOFF

Write

Data Reg

Control

Logic

C

9

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CY7C1423JV18-300BZI Datasheet(PDF) 2 Page - Cypress Semiconductor

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