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CY4605 Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY4605
Description  EZ-USB HX2LP Low Power USB 2.0 Hub Controller Family
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY4605 Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY7C656xx
Document Number: 38-08037 Rev. *M
Page 4 of 25
Functional Overview
The Cypress CY7C656xx USB 2.0 Hubs are high performance,
low system cost solutions for USB. The CY7C656xx USB 2.0
Hubs integrate 1.5 kΩ upstream pull up resistors for full speed
operation and all downstream 15 kΩ pull down resistors and
series termination resistors on all upstream and downstream D+
and D– pins. This results in optimization of system costs by
providing built-in support for the USB 2.0 specification.
System Initialization
On power up, the CY7C656xx reads an external SPI EEPROM
for configuration information. At the most basic level, this
EEPROM has the Vendor ID (VID), Product ID (PID), and Device
ID (DID) for the customer's application. For more specialized
applications, other configuration options can be specified. See
Configuration Options on page 12 for more details.
After reading the EEPROM, if VBUSPOWER (connected to
up-stream VBUS) is high, CY7C656xx enables the pull up resistor
on D+ to indicate its presence to the upstream hub, after which
a USB Bus Reset is expected. During this reset, CY7C656xx
initiates a chirp to indicate that it is a high speed peripheral. In a
USB 2.0 system, the upstream hub responds with a chirp
sequence, and CY7C656xx is in a high speed mode, with the
upstream D+ pull up resistor turned off. In USB 1.x systems, no
such chirp sequence from the upstream hub is seen, and
CY7C656xx operates as a normal 1.x hub (operating at full
speed).
Enumeration
After a USB Bus Reset, CY7C656xx is in an unaddressed,
unconfigured state (configuration value set to ’0’). During the
enumeration process, the host sets the hub's address and
configuration.
After the hub is configured, the full hub functionality is available.
Downstream Ports
The CY7C656xx supports a maximum of four downstream ports,
each of which may be marked as usable or removable in the
extended configuration (0xD2 EEPROM load or 0xD4 EEPROM
load, see Configuration Options on page 12. Downstream D+
and D– pull down resistors are incorporated in CY7C656xx for
each port. Before the hubs are configured, the ports are driven
SE0 (Single Ended Zero, where both D+ and D– are driven low)
and are set to the unpowered state. When the hub is configured,
the ports are not driven and the host may power the ports by
sending a SetPortPower command for each port. After a port is
powered, any connect or disconnect event is detected by the
hub. Any change in the port state is reported by the hubs back
to the host through the Status Change Endpoint (endpoint 1). On
receipt of SetPortReset request for a port with a device
connected, the hub does as follows:
Performs a USB Reset on the corresponding port
Puts the port in an enabled state
Enables the green port indicator for that port (if not previously
overridden by the host)
Enables babble detection after the port is enabled.
Babble consists of a non idle condition on the port after EOF2. If
babble is detected on an enabled port, that port is disabled. A
ClearPortEnable request from the host also disables the
specified port.
Downstream ports can be individually suspended by the host
with the SetPortSuspend request. If the hub is not suspended, a
remote wakeup event on that port is reflected to the host through
a port change indication in the Hub Status Change Endpoint. If
the hub is suspended, a remote wakeup event on this port is
forwarded to the host. The host may resume the port by sending
a ClearPortSuspend command.
Upstream Port
The upstream port includes the transmitter and the receiver state
machine. The transmitter and receiver operate in high speed and
full speed depending on the current hub configuration.
The transmitter state machine monitors the upstream facing port
while the Hub Repeater has connectivity in the upstream
direction. This machine prevents babble and disconnect events
on the downstream facing ports of this hub from propagating and
causing the hub to be disabled or disconnected by the hub to
which it is attached.
Power Switching
The CY7C656xx includes interface signals for external port
power switches. Both ganged and individual (per-port) configu-
rations are supported, with individual switching being the default.
Initially all ports are unpowered. After enumerating, the host may
power each port by sending a SetPortPower request for that port.
The power switching and overcurrent detection of downstream
ports is managed by control pins connected to an external power
switch device. PWR [n]# output pins of the CY7C656xx series
are connected to the respective external power switch's port
power enable signals. Note that each port power output pin of
the external power switch must be bypassed with an electrolytic
or tantalum capacitor as required by the USB specification.
These capacitors supply the inrush currents, which occur during
downstream device hot-attach events. The polarity of this pin is
configured through the EEPROM; see Configuration Options on
page 12.
Overcurrent Detection
Overcurrent detection includes 8 ms of timed filtering by default.
This parameter is configured from the external EEPROM in a
range of 0 ms to 15 ms for both enabled ports and disabled ports
individually. Detection of overcurrent on downstream ports is
managed by control pins connected to an external power switch
device.
The OVR[n]# pins of the CY7C656xx series are connected to the
respective external power switch's port overcurrent indication
(output) signals. After detecting an overcurrent condition, hub
reports overcurrent condition to the host and disables the PWR#
output to the external power device. The polarity of the OVR pins
can be configured through the EEPROM; see Configuration
Options on page 12.
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