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KAD5612P-12Q72 Datasheet(PDF) 4 Page - Intersil Corporation

Part # KAD5612P-12Q72
Description  Dual 12-Bit, 250/210/170/125MSPS A/D Converter
Download  28 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

KAD5612P-12Q72 Datasheet(HTML) 4 Page - Intersil Corporation

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4
FN6803.1
January 21, 2009
Absolute Maximum Ratings
Thermal Information
AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V
OVDD to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 2.1V
AVSS to OVSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
Analog Inputs to AVSS. . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Clock Inputs to AVSS. . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Logic Inputs to OVSS. . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Thermal Resistance (Typical, Note 2)
θJA (°C/W)
72 Ld QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
NOTE:
2.
θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
TA = -40°C to +85°C (typical specifications at +25°C), AIN = -1dBFS, fSAMPLE = Maximum Conversion Rate
(per speed grade).
PARAMETER
SYMBOL
CONDITIONS
KAD5612P-25
KAD5612P-21
KAD5612P-17
KAD5612P-12
UNITS
MIN
TYP
MAX MIN
TYP
MAX MIN
TYP
MAX MIN
TYP
MAX
DC SPECIFICATIONS (Note 3)
Analog Input
Full-Scale Analog
Input Range
VFS
Differential
1.40
1.47
1.54
1.40
1.47
1.54
1.40
1.47
1.54
1.40
1.47
1.54
VP-P
Input Resistance
RIN
Differential
1000
1000
1000
1000
Ω
Input Capacitance
CIN
Differential
1.8
1.8
1.8
1.8
pF
Full Scale Range
Temp. Drift
AVTC
Full Temp
90
90
90
90
ppm/°C
Input Offset Voltage
VOS
-10
±2
10
-10
±2
10
-10
±2
10
-10
±2
10
mV
Gain Error
EG
±2
±2
±2
±2
%
Common-Mode
Output Voltage
VCM
435
535
635
435
535
635
435
535
635
435
535
635
mV
Clock Inputs
Inputs Common
Mode Voltage
0.9
0.9
0.9
0.9
V
CLKP,CLKN Input
Swing
1.8
1.8
1.8
1.8
V
Power Requirements
1.8V Analog Supply
Voltage
AVDD
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
1.8V Digital Supply
Voltage
OVDD
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
1.8V Analog Supply
Current
IAVDD
170
177
158
165
142
152
128
135
mA
1.8V Digital Supply
Current (Note 3)
IOVDD
3mA LVDS
68
76
66
74
64
72
62
70
mA
Power Supply
Rejection Ratio
PSRR
30MHz, 200mVP-P
signal on AVDD
-36
-36
-36
-36
dB
Power Dissipation
Normal Mode
PD
3mA LVDS
429
456
405
432
372
405
342
369
mW
Nap Mode
PD
148
163
142
157
136
151
129
143
mW
Sleep Mode
PD
15
18
14
17
13
16
12
15
mW
KAD5612P


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