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KAD5514P-21Q48 Datasheet(PDF) 11 Page - Intersil Corporation |
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KAD5514P-21Q48 Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 32 page 11 FN6804.1 March 4, 2009 ? Pin Descriptions—48QFN PIN NUMBER LVDS [LVCMOS] NAME LVDS [LVCMOS] FUNCTION 1, 9, 13, 17, 47 AVDD 1.8V Analog Supply 2-4, 11 DNC Do Not Connect 5, 8, 12, 48 AVSS Analog Ground 6, 7 VINN, VINP Analog Input Negative, Positive 10 VCM Common Mode Output 14, 15 CLKP, CLKN Clock Input True, Complement 16 NAPSLP Tri-Level Power Control (Nap, Sleep Modes) 18 RESETN Power-on Reset (Active Low, see page 17) 19, 29, 42 OVSS Output Ground 20, 37 OVDD 1.8V Output Supply 21, 22 D0N, D0P [NC, D0] LVDS Bit 0 (LSB) Output Complement, True [NC, LVCMOS Bit 0] 23, 24 D1N, D1P [NC, D1] LVDS Bit 1 Output Complement, True [NC, LVCMOS Bit 1] 25, 26 D2N, D2P [NC, D2] LVDS Bit 2 Output Complement, True [NC, LVCMOS Bit 2] 27, 28 D3N, D3P [NC, D3] LVDS Bit 3 Output Complement, True [NC, LVCMOS Bit 3] 30 RLVDS LVDS Bias Resistor 31, 32 CLKOUTN, CLKOUTP [NC, CLKOUT] LVDS Clock Output Complement, True [NC, LVCMOS CLKOUT] 33, 34 D4N, D4P [NC, D4] LVDS Bit 4 Output Complement, True [NC, LVCMOS Bit 4] 35, 36 D5N, D5P [NC, D5] LVDS Bit 5 Output Complement, True [NC, LVCMOS Bit 5] 38, 39 D6N, D6P [NC, D6] LVDS Bit 6 Output Complement, True [NC, LVCMOS Bit 6] 40, 41 ORN, ORP [NC, OR] LVDS Over Range Complement, True [NC, LVCMOS Over Range] 43 SDO SPI Serial Data Output (4.7k Ω pull-up to OVDD is required) 44 CSB SPI Chip Select (active low) 45 SCLK SPI Clock 46 SDIO SPI Serial Data Input/Output Exposed Paddle AVSS Analog Ground NOTE: LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection) KAD5514P |
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