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KAD5512HP-25Q48 Datasheet(PDF) 11 Page - Intersil Corporation |
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KAD5512HP-25Q48 Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 32 page 11 FN6808.2 March 4, 2009 Pin Descriptions - 48QFN PIN NUMBER LVDS [LVCMOS] NAME LVDS [LVCMOS] FUNCTION 1, 9, 13, 17, 47 AVDD 1.8V Analog Supply 2-4, 11, 21, 22 DNC Do Not Connect 5, 8, 12, 48 AVSS Analog Ground 6, 7 VINN, VINP Analog Input Negative, Positive 10 VCM Common Mode Output 14, 15 CLKP, CLKN Clock Input True, Complement 16 NAPSLP Power Control (Nap, Sleep modes) 18 RESETN Power On Reset (Active Low, see page 17) 19, 29, 42 OVSS Output Ground 20, 37 OVDD 1.8V Output Supply 23, 24 D0N, D0P [NC, D0] LVDS Bit 0 (LSB) Output Complement, True [NC, LVCMOS Bit 0] 25, 26 D1N, D1P [NC, D1] LVDS Bit 1 Output Complement, True [NC, LVCMOS Bit 1] 27, 28 D2N, D2P [NC, D2] LVDS Bit 2 Output Complement, True [NC, LVCMOS Bit 2] 30 RLVDS LVDS Bias Resistor (connect to OVSS with a 10k Ω, 1% resistor) 31, 32 CLKOUTN, CLKOUTP [NC, CLKOUT] LVDS Clock Output Complement, True [NC, LVCMOS CLKOUT] 33, 34 D3N, D3P [NC, D3] LVDS Bit 3 Output Complement, True [NC, LVCMOS Bit 3] 35, 36 D4N, D4P [NC, D4] LVDS Bit 4 Output Complement, True [NC, LVCMOS Bit 4] 38, 39 D5N, D5P [NC, D5] LVDS Bit 5 Output Complement, True [NC, LVCMOS Bit 5] 40, 41 ORN, ORP [NC, OR] LVDS Over Range Complement, True [NC, LVCMOS Over Range] 43 SDO SPI Serial Data Output (4.7k Ω pull-up to OVDD is required) 44 CSB SPI Chip Select (active low) 45 SCLK SPI Clock 46 SDIO SPI Serial Data Input/Output Exposed Paddle AVSS Analog Ground NOTE: LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection) KAD5512HP |
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