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ISL99201IIAZ-TK Datasheet(PDF) 6 Page - Intersil Corporation |
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ISL99201IIAZ-TK Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 13 page 6 FN6742.0 February 27, 2009 Pin Descriptions SD Shutdown Active Low. This signal is used to shut down and activate the part. It is 1.8V to 5V compatible. During shutdown, the part draws less than 100nA input current. Coming out of shutdown takes 3.5ms and going into shutdown is instantaneous. SYNC External clock input (available only in DFN). This pin allows the chip to be synchronized to a system clock. This helps in folding the spectral components and the switching harmonic out of band of interest. The range of SYNC frequency is from 250kHz to 800kHz. IN+ Positive Differential Input. IN- Negative Differential Input. VO+ Positive BTL output. GND Ground (Analog ground in CSP) VDD Power Supply (Analog VDD in CSP) VO- Negative BTL output PVDD Power Supply (CSP only) PGND Power Ground (CSP only) Block Diagram (Notes *) S A W TOOTH GENERA TO R SH UTDOW N LOGIC OVE R CU RRENT PRO TECTIO N BIA S AN D R E FERENC E C LIC K AN D P O P S U PP R E SS IO N VDD VO - VO + SD SY N C 1 IN + IN- GN D GATE D R IV E WITH SRC G A TE D R IVE WITH SR C CO M P COM P VDD VD D +180° + - - + - + + - + - Notes: Gain = 6dB, 9.6dB, 12dB (gain setting) Gain = ; with external resistor 140k Ω (Ri + 5k Ω) *TDFN only ISL99201 |
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