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CY7B991
CY7B992
Document Number: 38-07138 Rev. *B
Page 7 of 19
Capacitance
CMOS output buffer current and power dissipation specified at 50 MHz reference frequency.
Parameter
Description
Test Conditions
Max
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz, VCC = 5.0V
10
pF
AC Test Loads and Waveforms
TTL AC Test Load (CY7B991)
TTL Input Test Waveform (CY7B991)
5V
R1
R2
CL
R1
R2
CL
CMOS AC Test Load (CY7B992)
3.0V
2.0V
Vth =1.5V
0.8V
0.0V
≤1ns
≤1ns
2.0V
0.8V
Vth =1.5V
80%
Vth =VCC/2
20%
0.0V
≤3ns
≤3ns
80%
20%
Vth =VCC/2
CMOS Input Test Waveform (CY7B992)
VCC
R1=130
R2=91
CL =50 pF (CL =30 pF for –2 and –5 devices)
(Includes fixture and probe capacitance)
R1=100
R2=100
CL =50 pF (CL
(Includes fixture and probe capacitance)
VCC
=30 pF for –2 and –5 devices)
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