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MC9S08DE60 Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC9S08DE60 Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc |
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11 / 412 page  MC9S08DE60 Series Data Sheet, Rev. 3 Freescale Semiconductor 11 Section Number Title Page 6.3.1 Edge Only Sensitivity .......................................................................................................87 6.3.2 Edge and Level Sensitivity ................................................................................................88 6.3.3 Pull-up/Pull-down Resistors .............................................................................................88 6.3.4 Pin Interrupt Initialization .................................................................................................88 6.4 Pin Behavior in Stop Modes.............................................................................................................88 6.5 Parallel I/O and Pin Control Registers .............................................................................................89 6.5.1 Port A Registers ................................................................................................................90 6.5.2 Port B Registers ................................................................................................................94 6.5.3 Port C Registers ................................................................................................................98 6.5.4 Port D Registers ..............................................................................................................101 6.5.5 Port E Registers ...............................................................................................................105 6.5.6 Port F Registers ...............................................................................................................108 6.5.7 Port G Registers ..............................................................................................................111 Chapter 7 Central Processor Unit (S08CPUV3) 7.1 Introduction ....................................................................................................................................115 7.1.1 Features ...........................................................................................................................115 7.2 Programmer’s Model and CPU Registers ......................................................................................116 7.2.1 Accumulator (A) .............................................................................................................116 7.2.2 Index Register (H:X) .......................................................................................................116 7.2.3 Stack Pointer (SP) ...........................................................................................................117 7.2.4 Program Counter (PC) ....................................................................................................117 7.2.5 Condition Code Register (CCR) .....................................................................................117 7.3 Addressing Modes..........................................................................................................................119 7.3.1 Inherent Addressing Mode (INH) ...................................................................................119 7.3.2 Relative Addressing Mode (REL) ...................................................................................119 7.3.3 Immediate Addressing Mode (IMM) ..............................................................................119 7.3.4 Direct Addressing Mode (DIR) ......................................................................................119 7.3.5 Extended Addressing Mode (EXT) ................................................................................120 7.3.6 Indexed Addressing Mode ..............................................................................................120 7.4 Special Operations..........................................................................................................................121 7.4.1 Reset Sequence ...............................................................................................................121 7.4.2 Interrupt Sequence ..........................................................................................................121 7.4.3 Wait Mode Operation ......................................................................................................122 7.4.4 Stop Mode Operation ......................................................................................................122 7.4.5 BGND Instruction ...........................................................................................................123 7.5 HCS08 Instruction Set Summary ...................................................................................................124 Chapter 8 Multi-Purpose Clock Generator (S08MCGV1) 8.1 Introduction ....................................................................................................................................135 |
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