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TVP6000C Datasheet(PDF) 10 Page - Texas Instruments |
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TVP6000C Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 57 page  1–4 1.5 Ordering Information Device TVP6000CPFP PFP: Plastic Flat Pack With Power Pad 1.6 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION AGND 31,34,37 Analog ground AVDD 33,36,39 Analog power supply C 32 O Chrominance analog output signal for S-video output CCIR 65 O External clock source select. CCIR can be programmed to select different external clock sources. When CCIR = 1, the encoder is set to CCIR601 mode. For detailed programming information, refer to Table 2–11. CDIR 18 I Clock direction input. When CDIR = 0, LLC and CREF are outputs. When CDIR = 1, LLC and CREF are inputs. COMP 41 I/O Compensation pin for the internal reference amplifier. A 0.1- µF capacitor should be connected between COMP and AVDD. CREF 5 I/O Clock reference signal CVBS 38 O Composite video output signal DGND 6,19,48, 51,70,73 Digital ground DREF 43 I/O Test pin. For normal applications no connect. DVDD 8,20,49, 52,68,75 Digital power supply FSADJ 44 I/O Full scale adjust control. A 264- Ω resistor should be connected between FSADJ and AGND to control the full-scale output current on the analog outputs. GLCI 10 I Genlock control input. GLCI is used for communicating with TVP5xxx decoder series. INVGND 47 INVGND should be connected to AGND for normal applications. LLC 7 I/O Line locked clock. One of the 24.54 MHz, 27.00 MHz, or 29.5 MHz clocks for different standards and pixel rates. NC 21–30,40, 61–63,80 No connect NTSQ 66 O External clock source select. NTSQ can be programmed to select different external clock sources. When NTSQ = 1, the encoder is set to NTSC square pixel mode. For detailed programming information, refer to Table 2–11. PASQ 67 O External clock source select. PASQ can be programmed to select different external clock sources. When PASQ = 1, the encoder is set to PAL square pixel mode. For detailed programming information, refer to Table 2–11. |
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