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TPS65000RTER Datasheet(PDF) 4 Page - Texas Instruments |
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TPS65000RTER Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 30 page  TPS65000, TPS65001, TPS650001 TPS650003, TPS650006, TPS650061 SLVS810A – JUNE 2009 – REVISED OCTOBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Over full operating ambient temperature range, typical values are at TA = 25° C. Unless otherwise noted, specifications apply for condition VIN = EN_LDOx = EN_DCDC = 3.6 V. External components L = 2.2 μH, COUT = 10 μF, CIN = 4.7 μF, (see the parameter measurement information). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT TPS65001 MODE low, EN_DCDC high, EN_LDO1/2 low, 24 37 μA IOUT = 0 mA and no switching MODE low, EN_DCDC low, IQ Operating quiescent current EN_LDO1/2 high, IOUT = 0mA 55 62 μA IOUT = 0 mA and no switching (3) EN_DCDC high, MODE high, 4 mA EN_LDO1/2 low, IOUT = 0mA ISD Shutdown Current EN_DCDC low EN_LDO1 and EN_LDO2 low 11 17 μA DIGITAL PINS (EN_DCDC, EN_LDO1, EN_LDO2, MODE, PG, MR, RST VIH High level input voltage 1.2 V VIL Low level input voltage 0.4 V VOL Low level output voltage PG and RST pins only, IO = -100μA 0.4 V MODE, EN_DCDC, EN_LDO1, EN_LDO2 tied to Ilkg Input leakage current 0.01 0.1 μA GND or VINDCDC OSCILLATOR fSW Oscillator frequency 1.722 2.25 2.847 MHz STEP DOWN CONVERTER POWER SWITCH High side MOSFET on-resistance 240 480 RDS(on) VINDCDC = VGS = 3.6V m Ω Low side MOSFET on-resistance 185 380 2.3 V ≤ VINDCDC ≤ 2.5V 300 IO DC output current mA 2.5 V ≤ VINDCDC ≤ 6V 600 DC output current (TPS650061 1000 IO 2.7 V ≤ VINDCDC ≤ 6V mA ONLY) Forward current limit PMOS and ILIMF 2.3 V ≤ VINDCDC ≤ 6V 800 1000 1400 mA NMOS Forward current limit PMOS and ILIMF 2.7 V ≤ VINDCDC ≤ 6V 1200 1500 1680 mA NMOS (TPS650061 ONLY) Thermal shutdown Increasing junction temperature 150 TSD °C Thermal shutdown hysteresis Decreasing junction temperature 30 STEP DOWN CONVERTER OUTPUT VOLTAGE Adjustable output voltage range, VDCDC 0.6 VINDCDC V DCDC FB_DCDC pin current 0.1 μA Vref Internal reference voltage 0.594 0.6 0.606 V Output Voltage Accuracy (PWM MODE = high, –1.5% 0% 1.5% Mode)(4) 2.3 ≤ VINDCDC ≤ 6V VDCDC Output Voltage Accuracy (PFM MODE low 1% mode) (5) +1% voltage positioning active Load regulation (PWM mode) MODE high 0.5 %/A tStart Start-up time EN_DCDC to start of switching (10%) 250 μs tRamp VDCDC ramp up time VDCDC ramp from 10% to 90% 250 μs Internal discharge resistance at EN_DCDC low RDIS 450 Ω SW (3) The max quiescent current of enabling LDOs is 8 μA higher for TPS650001, TPS650003, TPS650006 and TPS650061. (4) For VINDCDC = VDCDC + 1V (5) In PFM Mode, the internal reference voltage is typ 1.01 × VREF. 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65000 TPS65001 TPS650001 TPS650003 TPS650006 TPS650061 |
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