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TPS61240 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS61240 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 25 page V =3.6V I =150mA IN OUT V =5V OUT EN=5V/div I =200mA/div COIL V =2V/div OUT t-TimeBase-100 s/div m V =3.6V I =150mA IN OUT V =5V OUT EN=5V/div I =200mA/div COIL V =1V/div OUT V =1V/div IN t-TimeBase-200 s/div m DETAILED DESCRIPTION OPERATION CURRENT LIMIT OPERATION - - ´ D D ´ » OUT IN IN OUT(CL) VALLEY L L OUT V V 1 V D I = (1 D) (I + I ) with I = and D 2 L f V (1) TPS61240, TPS61241 SLVS806A – APRIL 2009 – REVISED MAY 2009 .............................................................................................................................................................. www.ti.com Figure 15. Startup After Enable – With Load Figure 16. Startup and Shutdown The TPS6124x Boost Converter operates with typically 3.5MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents the converter will automatically enter Power Save Mode and operates then in PFM (Pulse Frequency Modulation) mode. During PWM operation the converter uses a unique fast response quasi-constant on-time valley current mode controller scheme which allows “Best in Class” line and load regulation allowing the use of small ceramic input and output capacitors. Based on the VIN/VOUT ratio, a simple circuit predicts the required on-time. At the beginning of the switching cycle, the low-side N-MOS switch is turned-on and the inductor current ramps up to a defined peak current. In the second phase, once the peak current is reached, the current comparator trips, the on-timer is reset turning off the switch, and the current through the inductor then decays to an internally set valley current limit. Once this occurs, the on-timer is set to turn the boost switch back on again and the cycle is repeated. The current limit circuit employs a valley current sensing scheme. Current limit detection occurs during the off time through sensing of the voltage drop across the synchronous rectifier. The output voltage is reduced as the power stage of the device operates in a constant current mode. The maximum continuous output current (IOUT(CL)), before entering current limit operation, can be defined by Equation 1 as shown. Figure 17 illustrates the inductor and rectifier current waveforms during current limit operation. The output current, IOUT, is the average of the rectifier ripple current waveform. When the load current is increased such that the lower peak is above the current limit threshold, the off time is lengthened to allow the current to decrease to this threshold before the next on-time begins (so called frequency fold-back mechanism). 10 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS61240, TPS61241 |
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