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TPS53114PWP Datasheet(PDF) 7 Page - Texas Instruments |
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TPS53114PWP Datasheet(HTML) 7 Page - Texas Instruments |
7 / 20 page HIGH-SIDE DRIVER PWM FREQUENCY AND ADAPTIVE ON-TIME CONTROL SOFT START AND PRE-BIASED SOFTSTART SWITCHING FREQUENCY SELECTION OUTPUT DISCHARGE CONTROL CURRENT PROTECTION W ´ m trip trip V (mV) = R (k ) 10( A) (1) TPS53114 www.ti.com ..................................................................................................................................................................................................... SLVS887 – APRIL 2009 The high-side driver is designed to drive high current, low RDS(on) N-channel MOSFET(s). When configured as a floating driver, a 5V bias voltage is delivered from VREG5 supply. The average drive current is also calculated by the gate charge at Vgs=5V times switching frequency. The instantaneous drive current is supplied by the capacitor between VBST and SW pins. The drive capability is represented by its internal resistance. The TPS53114 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator; however, the device runs with pseudo-constant frequency by feed-forwarding the input and output voltage into the on-time one-shot timer. The on-time control is inversely proportional to the input voltage and proportional to the output voltage; therefore, the duty ratio is VO/VIN and has the same cycle time. The TPS53114 has an adjustable soft-start. When the EN pin becomes high, 2.0 µA current begins charging the capacitor which is connected from SS pin to GND. Smooth control of the output voltage is maintained during start up. The TPS53114 contains a unique circuit to prevent current from being pulled from the output during startup in the condition the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft-start becomes greater than feedback voltage [VFB]), the controller slowly activates synchronous rectification by starting the first DRVL pulses with a narrow on-time. It then increments that on-time on a cycle-by-cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the initial sinking of the pre-bias output, and ensures that the out voltage (VO) starts and ramps up smoothly into regulation and the control loop is given time to transition from pre-biased start-up to normal mode operation. Connect FSEL pin to GND for a switching frequency (fSW) is 350kHz. Connect FSEL pin to V5FILT for a switching frequency (fSW) is 700kHz. The TPS53114 discharges the outputs when EN is low, or the controller is turned off by the protection functions (OVP, UVP, UVLO, and thermal shutdown). The device discharges output using an internal 40- Ω MOSFET which is connected to VO and PGND. The external low-side MOSFET is not turned on during the output discharge operation to avoid the possibility of causing negative voltage at the output. This discharge ensures that, on start, the regulated voltage always initializes from zero volts. The TPS53114 has cycle-by-cycle over current limiting control. The inductor current is monitored during the OFF state and the controller retains the OFF state when the inductor current is larger than the over current trip level. In order to provide both accuracy and cost effective solution, the device supports temperature compensated MOSFET RDS(on) sensing. The TRIP pin should be connected to GND through the trip voltage setting resistor, Rtrip. The TRIP terminal provides 10µA (Itrip) of current at the ambient temperature and the trip level is set to the OCL trip voltage (Vtrip) as follows. The trip level is in the range of 30mV to 200mV over all operational temperatures. The inductor current is monitored by the voltage between PGND pin and SW pin. Itrip has 4000ppm/°C temperature slope to compensate the temperature dependency of RDS(on). PGND is used as the positive current sensing node so that PGND is connected to the source terminal of the bottom MOSFET. As the comparison is done during the OFF state, Vtrip sets the valley level of the inductor current; therefore, the load current at over current threshold, Iocp, can be calculated as follows: Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TPS53114 |
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