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TMS320C28341 Datasheet(PDF) 7 Page - Texas Instruments |
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TMS320C28341 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 153 page TMS320C28346, TMS320C28345, TMS320C28344 TMS320C28343, TMS320C28342, TMS320C28341 Delfino Microcontrollers www.ti.com SPRS516 – MARCH 2009 6-2 TMS320C28345/C28343/C28341 Current Consumption by Power-Supply Pins at 200-MHz SYSCLKOUT ....... 103 6-3 Typical Current Consumption by Various Peripherals ..................................................................... 104 6-4 Clocking and Nomenclature (300-MHz devices) ............................................................................ 107 6-5 Clocking and Nomenclature (200-MHz devices) ............................................................................ 107 6-6 Input Clock Frequency .......................................................................................................... 108 6-7 XCLKIN Timing Requirements - PLL Enabled ............................................................................... 108 6-8 XCLKIN Timing Requirements - PLL Disabled .............................................................................. 108 6-9 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ....................................................... 108 6-10 Reset (XRS) Timing Requirements ........................................................................................... 111 6-11 General-Purpose Output Switching Characteristics ......................................................................... 112 6-12 General-Purpose Input Timing Requirements ............................................................................... 113 6-13 IDLE Mode Timing Requirements ............................................................................................. 115 6-14 IDLE Mode Switching Characteristics ......................................................................................... 115 6-15 STANDBY Mode Timing Requirements ...................................................................................... 115 6-16 STANDBY Mode Switching Characteristics ................................................................................. 116 6-17 HALT Mode Timing Requirements ............................................................................................ 116 6-18 HALT Mode Switching Characteristics ....................................................................................... 117 6-19 ePWM Timing Requirements ................................................................................................... 118 6-20 ePWM Switching Characteristics .............................................................................................. 118 6-21 Trip-Zone input Timing Requirements ........................................................................................ 118 6-22 High Resolution PWM Characteristics at SYSCLKOUT = (150 - 300 MHz) ............................................. 119 6-23 Enhanced Capture (eCAP) Timing Requirement ............................................................................ 119 6-24 eCAP Switching Characteristics ............................................................................................... 119 6-25 Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements .................................................... 119 6-26 eQEP Switching Characteristics ............................................................................................... 119 6-27 External ADC Start-of-Conversion Switching Characteristics .............................................................. 119 6-28 External Interrupt Timing Requirements ...................................................................................... 120 6-29 External Interrupt Switching Characteristics ................................................................................. 120 6-30 I2C Timing ....................................................................................................................... 121 6-31 SPI Master Mode External Timing (Clock Phase = 0) ...................................................................... 122 6-32 SPI Master Mode External Timing (Clock Phase = 1) ...................................................................... 124 6-33 SPI Slave Mode External Timing (Clock Phase = 0) ........................................................................ 125 6-34 SPI Slave Mode External Timing (Clock Phase = 1) ........................................................................ 126 6-35 Relationship Between Parameters Configured in XTIMING and Duration of Pulse .................................... 127 6-36 XINTF Clock Configurations .................................................................................................... 130 6-37 External Interface Read Timing Requirements .............................................................................. 131 6-38 External Interface Read Switching Characteristics .......................................................................... 131 6-39 External Interface Write Switching Characteristics .......................................................................... 132 6-40 External Interface Read Switching Characteristics (Ready-on-Read, 1 Wait State) .................................... 134 6-41 External Interface Read Timing Requirements (Ready-on-Read, 1 Wait State) ........................................ 134 6-42 Synchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State) ......................................... 134 List of Tables 7 |
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