TPS73HD301, TPS73HD318, TPS73HD325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS167C – SEPTEMBER 1998 – REVISED – MAY 1999

7

POST OFFICE BOX 655303

shorted to OUT (unless otherwise noted) (continued)

2.5-V regulator (TPS73HD325)

PARAMETER

TEST CONDITIONS‡

TJ

MIN

TYP

MAX

UNIT

VO

Output voltage

43 V

≤ VI ≤ 10 V

25

°C

2.45

2.5

2.55

V

VO

Output voltage

4.3 V

≤ VI ≤ 10 V

–40

°C to 125°C

2.425

2.575

V

Dropout voltage

IO = 750 mA,

VI = 3.5 V

–40

°C to 125°C

800

mV

Input regulation

50

µA ≤ IO ≤ 750 mA, See NOTE 2

25

°C

6

mV

Output regulation

IO = 5 mA to 750 mA, See NOTE 2

25

°C

20

mV

Output regulation

IO = 50 µA to 750 mA, See NOTE 2

25

°C

25

mV

Ripple rejection

f = 120 Hz,

IO = 50 µA

25

°C

51

dB

Ripple rejection

f = 120 Hz,

IO = 500 mA

25

°C

49

dB

Output noise-spectral density

f = 120 Hz

25

°C

2

mV/

√Hz

10 H

≤ f ≤ 100 kH

CL = 4.7 µF

25

°C

274

Output noise voltage

10 Hz

≤ f ≤ 100 kHz,

CSR = 1

Ω

CL = 10 µF

25

°C

228

µV/rms

CSR = 1

Ω

CL = 100 µF

25

°C

159

V(TO)

Trip-threshold voltage

(RESET)

VO decreasing

–40

°C to 125°C

2.172

V

Vhys

Hysteresis voltage (RESET)

25

°C

18

mV

VOL

Low-level output voltage

VI =2 8V

IO(RESET) =1 mA

25

°C

0.17

0.4

V

VOL

g

(RESET)

VI = 2.8 V,

IO(RESET) = –1 mA

–40

°C to 125°C

0.4

V

† CSR (compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any

series resistance added externally, and PWB trace resistance to CL.

‡ Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must

be taken into account separately.

§ Pass-element series resistance measured with sense pin disconnected from output to allow output voltge to rise to full saturation.

switching characteristics

PARAMETER

TEST CONDITIONS

TJ

MIN

TYP

MAX

UNIT

Time out delay (RESET)

See Figure 3

25

°C

140

200

260

ms

Time-out delay (RESET)

See Figure 3

–40

°C to 125°C

100

300

ms