TPIC6A595

POWER LOGIC 8-BIT SHIFT REGISTER

SLIS005A – APRIL 1993 – REVISED JANUARY 1995

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POST OFFICE BOX 655303

description

The TPIC6A595 is a monolithic, high-voltage,

high-current power logic 8-bit shift register

designed for use in systems that require relatively

high load power. The device contains a built-in

voltage clamp on the outputs for inductive

transient protection. Power driver applications

include relays, solenoids, and other medium-cur-

rent or high-voltage loads. Each open-drain

DMOS

transistor

features

an

independent

chopping

current-limiting

circuit

to

prevent

damage in the case of a short circuit.

This device contains an 8-bit serial-in, parallel-out

shift register that feeds an 8-bit, D-type storage

register. Data transfers through both the shift and

storage registers on the rising edge of the shift-

register clock (SRCK) and the register clock

(RCK),

respectively.

The

storage

register

transfers data to the output buffer when shift-

register clear (SRCLR) is high. When SRCLR is

low, the input shift register is cleared. When output

enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held

low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) allows for

cascading of the data from the shift register to additional devices.

Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and a 350-mA continuous sink

current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high,

the DMOS-transistor outputs have sink current capability.

Separate power ground (PGND) and logic ground (LGND) terminals are provided to facilitate maximum system

flexibility. All PGND terminals are internally connected, and each PGND terminal must be externally connected

to the power system ground in order to minimize parasitic impedance. A single-point connection between LGND

and PGND must be made externally in a manner that reduces crosstalk between the logic and load circuits.

The TPIC6A595 is offered in a thermally-enhanced dual-in-line (NE) package and a wide-body surface-mount

(DW) package. The TPIC6A595 is characterized for operation over the operating case temperature range of

–40

°C to 125°C.

Copyright

© 1995, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

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DRAIN2

DRAIN3

SRCLR

G

PGND

PGND

RCK

SRCK

DRAIN4

DRAIN5

DRAIN1

DRAN0

SER IN

PGND

PGND

LGND

SER OUT

DRAIN7

DRAIN6

NE PACKAGE

(TOP VIEW)

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DRAIN2

DRAIN3

SRCLR

G

PGND

PGND

PGND

PGND

RCK

SRCK

DRAIN4

DRAIN5

DRAIN1

DRAIN0

SER IN

PGND

PGND

PGND

PGND

LGND

SER OUT

DRAIN7

DRAIN6

DW PACKAGE

(TOP VIEW)